Re: [PATCH 06/16] media: iris: Add platform data field for watchdog interrupt mask
From: Vishnu Reddy
Date: Mon May 11 2026 - 02:15:26 EST
On 5/7/2026 12:12 PM, Dmitry Baryshkov wrote:
> @@ -124,6 +127,7 @@ const struct iris_platform_data sm8250_data = {
> .tz_cp_config_data = tz_cp_config_vpu2,
> .tz_cp_config_data_size = ARRAY_SIZE(tz_cp_config_vpu2),
> .num_vpp_pipe = 4,
> + .wd_intr_mask = WRAPPER_INTR_STATUS_A2HWD_BMSK,
> .max_session_count = 16,
> .max_core_mbpf = NUM_MBS_8K,
> .max_core_mbps = ((7680 * 4320) / 256) * 60,
> diff --git a/drivers/media/platform/qcom/iris/iris_platform_vpu3x.c b/drivers/media/platform/qcom/iris/iris_platform_vpu3x.c
> index 829dc37b4058..6e63f279efbe 100644
> --- a/drivers/media/platform/qcom/iris/iris_platform_vpu3x.c
> +++ b/drivers/media/platform/qcom/iris/iris_platform_vpu3x.c
> @@ -17,6 +17,8 @@
> #include "iris_platform_sm8650.h"
> #include "iris_platform_sm8750.h"
>
> +#define WRAPPER_INTR_STATUS_A2HWD_BMSK BIT(3)
> +
> const struct iris_firmware_desc iris_vpu30_p4_s6_gen2_desc = {
> .firmware_data = &iris_hfi_gen2_data,
> .get_vpu_buffer_size = iris_vpu_buf_size,
> @@ -106,6 +108,7 @@ const struct iris_platform_data qcs8300_data = {
> .tz_cp_config_data = tz_cp_config_vpu3,
> .tz_cp_config_data_size = ARRAY_SIZE(tz_cp_config_vpu3),
> .num_vpp_pipe = 2,
> + .wd_intr_mask = WRAPPER_INTR_STATUS_A2HWD_BMSK,
> .max_session_count = 16,
> .max_core_mbpf = ((4096 * 2176) / 256) * 4,
> .max_core_mbps = (((3840 * 2176) / 256) * 120),
> @@ -135,6 +138,7 @@ const struct iris_platform_data sm8550_data = {
> .tz_cp_config_data = tz_cp_config_vpu3,
> .tz_cp_config_data_size = ARRAY_SIZE(tz_cp_config_vpu3),
> .num_vpp_pipe = 4,
> + .wd_intr_mask = WRAPPER_INTR_STATUS_A2HWD_BMSK,
> .max_session_count = 16,
> .max_core_mbpf = NUM_MBS_8K * 2,
> .max_core_mbps = ((7680 * 4320) / 256) * 60,
> @@ -172,6 +176,7 @@ const struct iris_platform_data sm8650_data = {
> .tz_cp_config_data = tz_cp_config_vpu3,
> .tz_cp_config_data_size = ARRAY_SIZE(tz_cp_config_vpu3),
> .num_vpp_pipe = 4,
> + .wd_intr_mask = WRAPPER_INTR_STATUS_A2HWD_BMSK,
> .max_session_count = 16,
> .max_core_mbpf = NUM_MBS_8K * 2,
> .max_core_mbps = ((7680 * 4320) / 256) * 60,
> @@ -201,6 +206,7 @@ const struct iris_platform_data sm8750_data = {
> .tz_cp_config_data = tz_cp_config_vpu3,
> .tz_cp_config_data_size = ARRAY_SIZE(tz_cp_config_vpu3),
> .num_vpp_pipe = 4,
> + .wd_intr_mask = WRAPPER_INTR_STATUS_A2HWD_BMSK,
> .max_session_count = 16,
> .max_core_mbpf = NUM_MBS_8K * 2,
> .max_core_mbps = ((7680 * 4320) / 256) * 60,
> diff --git a/drivers/media/platform/qcom/iris/iris_vpu_common.c b/drivers/media/platform/qcom/iris/iris_vpu_common.c
> index 59e4d68d042f..b8300195a43b 100644
> --- a/drivers/media/platform/qcom/iris/iris_vpu_common.c
> +++ b/drivers/media/platform/qcom/iris/iris_vpu_common.c
> @@ -109,11 +109,11 @@ void iris_vpu_raise_interrupt(struct iris_core *core)
>
> void iris_vpu_clear_interrupt(struct iris_core *core)
> {
> + u32 wd_intr_mask = core->iris_platform_data->wd_intr_mask;
> u32 intr_status, mask;
>
> intr_status = readl(core->reg_base + WRAPPER_INTR_STATUS);
> - mask = (WRAPPER_INTR_STATUS_A2H_BMSK |
> - WRAPPER_INTR_STATUS_A2HWD_BMSK |
> + mask = (WRAPPER_INTR_STATUS_A2H_BMSK | wd_intr_mask |
> CTRL_INIT_IDLE_MSG_BMSK);
>
> if (intr_status & mask)
> @@ -124,7 +124,9 @@ void iris_vpu_clear_interrupt(struct iris_core *core)
>
> int iris_vpu_watchdog(struct iris_core *core, u32 intr_status)
> {
> - if (intr_status & WRAPPER_INTR_STATUS_A2HWD_BMSK) {
> + u32 wd_intr_mask = core->iris_platform_data->wd_intr_mask;
> +
> + if (intr_status & wd_intr_mask) {
> dev_err(core->dev, "received watchdog interrupt\n");
> return -ETIME;
> }
> diff --git a/drivers/media/platform/qcom/iris/iris_vpu_register_defines.h b/drivers/media/platform/qcom/iris/iris_vpu_register_defines.h
> index 72168b9ffa73..4fffa094c52f 100644
> --- a/drivers/media/platform/qcom/iris/iris_vpu_register_defines.h
> +++ b/drivers/media/platform/qcom/iris/iris_vpu_register_defines.h
> @@ -41,7 +41,6 @@
> #define MSK_CORE_POWER_ON BIT(1)
>
> #define WRAPPER_INTR_STATUS (WRAPPER_BASE_OFFS + 0x0C)
> -#define WRAPPER_INTR_STATUS_A2HWD_BMSK BIT(3)
> #define WRAPPER_INTR_STATUS_A2H_BMSK BIT(2)
>
> #define WRAPPER_INTR_MASK (WRAPPER_BASE_OFFS + 0x10)
Reviewed-by: Vishnu Reddy <busanna.reddy@xxxxxxxxxxxxxxxx>