Re: [PATCH v1 2/4] media: chips-media: wave5: Add support for background detection

[Nicolas Dufresne]

Le mardi 24 mars 2026 à 14:03 +0900, Jackson.lee a écrit :
> From: Jackson Lee <jackson.lee@xxxxxxxxxxxxxxx>
> 
> Implement V4L2_CID_MPEG_VIDEO_BACKGROUND_DETECTION in the Wave5 encoder
> driver. When enabled, the hardware detects background regions in a frame
> and uses fewer bits or skip mode to encode them, reducing bitrate for
> streams with stationary scenes.
> 
> Signed-off-by: Jackson Lee <jackson.lee@xxxxxxxxxxxxxxx>
> Signed-off-by: Nas Chung <nas.chung@xxxxxxxxxxxxxxx>

Reviewed-by: Nicolas Dufresne <nicolas.dufresne@xxxxxxxxxxxxx>

> ---
>  drivers/media/platform/chips-media/wave5/wave5-hw.c      | 4 +++-
>  drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c | 7 +++++++
>  drivers/media/platform/chips-media/wave5/wave5-vpuapi.h  | 1 +
>  3 files changed, 11 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/media/platform/chips-media/wave5/wave5-hw.c
> b/drivers/media/platform/chips-media/wave5/wave5-hw.c
> index 687ce6ccf3ae..c516d125f553 100644
> --- a/drivers/media/platform/chips-media/wave5/wave5-hw.c
> +++ b/drivers/media/platform/chips-media/wave5/wave5-hw.c
> @@ -49,6 +49,7 @@
>  
>  #define FASTIO_ADDRESS_MASK		GENMASK(15, 0)
>  #define SEQ_PARAM_PROFILE_MASK		GENMASK(30, 24)
> +#define SEQ_BG_PARAM_REG_DATA		0x3800410
>  
>  static void _wave5_print_reg_err(struct vpu_device *vpu_dev, u32
> reg_fail_reason,
>  				 const char *func);
> @@ -1838,7 +1839,8 @@ int wave5_vpu_enc_init_seq(struct vpu_instance *inst)
>  	vpu_write_reg(inst->dev, W5_CMD_ENC_SEQ_RC_BIT_RATIO_LAYER_4_7, 0);
>  	vpu_write_reg(inst->dev, W5_CMD_ENC_SEQ_ROT_PARAM, rot_mir_mode);
>  
> -	vpu_write_reg(inst->dev, W5_CMD_ENC_SEQ_BG_PARAM, 0);
> +	vpu_write_reg(inst->dev, W5_CMD_ENC_SEQ_BG_PARAM,
> +		      SEQ_BG_PARAM_REG_DATA | p_param->bg_detection);
>  	vpu_write_reg(inst->dev, W5_CMD_ENC_SEQ_CUSTOM_LAMBDA_ADDR, 0);
>  	vpu_write_reg(inst->dev, W5_CMD_ENC_SEQ_CONF_WIN_TOP_BOT,
>  		      p_param->conf_win_bot << 16 | p_param->conf_win_top);
> diff --git a/drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
> b/drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
> index 7613fcdbafed..6fe01217233f 100644
> --- a/drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
> +++ b/drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c
> @@ -780,6 +780,9 @@ static int wave5_vpu_enc_s_ctrl(struct v4l2_ctrl *ctrl)
>  	case V4L2_CID_MPEG_VIDEO_BITRATE:
>  		inst->bit_rate = ctrl->val;
>  		break;
> +	case V4L2_CID_MPEG_VIDEO_BACKGROUND_DETECTION:
> +		inst->enc_param.bg_detection = ctrl->val;
> +		break;
>  	case V4L2_CID_MPEG_VIDEO_GOP_SIZE:
>  		inst->enc_param.avc_idr_period = ctrl->val;
>  		break;
> @@ -1205,6 +1208,7 @@ static int wave5_set_enc_openparam(struct enc_open_param
> *open_param,
>  	open_param->wave_param.beta_offset_div2 = input.beta_offset_div2;
>  	open_param->wave_param.decoding_refresh_type =
> input.decoding_refresh_type;
>  	open_param->wave_param.intra_period = input.intra_period;
> +	open_param->wave_param.bg_detection = input.bg_detection;
>  	if (inst->std == W_HEVC_ENC) {
>  		if (input.intra_period == 0) {
>  			open_param->wave_param.decoding_refresh_type =
> DEC_REFRESH_TYPE_IDR;
> @@ -1700,6 +1704,9 @@ static int wave5_vpu_open_enc(struct file *filp)
>  	v4l2_ctrl_new_std(v4l2_ctrl_hdl, &wave5_vpu_enc_ctrl_ops,
>  			  V4L2_CID_MPEG_VIDEO_AU_DELIMITER,
>  			  0, 1, 1, 1);
> +	v4l2_ctrl_new_std(v4l2_ctrl_hdl, &wave5_vpu_enc_ctrl_ops,
> +			  V4L2_CID_MPEG_VIDEO_BACKGROUND_DETECTION,
> +			  0, 1, 1, 0);
>  	v4l2_ctrl_new_std(v4l2_ctrl_hdl, &wave5_vpu_enc_ctrl_ops,
>  			  V4L2_CID_HFLIP,
>  			  0, 1, 1, 0);
> diff --git a/drivers/media/platform/chips-media/wave5/wave5-vpuapi.h
> b/drivers/media/platform/chips-media/wave5/wave5-vpuapi.h
> index c64135769869..dc31689e0d27 100644
> --- a/drivers/media/platform/chips-media/wave5/wave5-vpuapi.h
> +++ b/drivers/media/platform/chips-media/wave5/wave5-vpuapi.h
> @@ -570,6 +570,7 @@ struct enc_wave_param {
>  	u32 transform8x8_enable: 1; /* enable 8x8 intra prediction and 8x8
> transform */
>  	u32 mb_level_rc_enable: 1; /* enable MB-level rate control */
>  	u32 forced_idr_header_enable: 1; /* enable header encoding before IDR
> frame */
> +	u32 bg_detection: 1; /* enable background detection */
>  };
>  
>  struct enc_open_param {

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