Re: [PATCH v2 6/6] ASoC: dt-bindings: renesas,fsi: add support for multiple clocks

[Bui Duc Phuc]

Hi Krzysztof,

Thank you for your detailed review and feedback.

> Flexible is not allowed. Provide reasons for exception.

I understand and will remove this approach and replace it with
explicit valid clock combinations.

> This goes to the "clocks:"

Understood, I will move the description to "clocks".

> > +    minItems: 1
> > +    items:
> > +      - const: own
> > +      - &fsi_all_clks
>
> I don't understand this syntax.

Understood, I will drop the YAML anchor and use explicit constraints instead.

I will update it to the following structure:

  clocks:
    description: |
      Clock driving the FSI Controller :
      - "own": Main FSI module clock (must be first and always present)
      - "spu": SPU bus/bridge clock. On R8A7740, this clock must be
        enabled to allow register access as the FSI block is connected
        behind the SPU bus.
      - "icka" / "ickb": CPG DIV6 functional clocks for FSI port A/B
      - "diva"/"divb": Internal FSI dividers for port A/B used for
        audio clock generation
      - "xcka"/"xckb": External clock inputs for FSI port A/B
        provided by the board
    minItems: 1
    maxItems: 8

  clock-names:

    minItems: 1
    maxItems: 8

allOf:
  - $ref: dai-common.yaml#
  - if:
      properties:
        compatible:
          contains:
            const: renesas,fsi2-r8a7740
    then:
      properties:
        clock-names:
          oneOf:
            - items:
                - const: own
                - const: spu
            - items:
                - const: own
                - const: spu
                - const: ickb
                - const: divb

Best regards,
Phuc