[PATCH 00/35] irqchip/qcom-pdc: Clean up register mapping and DT descriptions

[Mukesh Ojha]

The Qualcomm PDC (Power Domain Controller) hardware exposes multiple DRV
(Driver) regions, each 0x10000 bytes in size, where each region serves a
specific client in the system . Linux only needs access to the APSS DRV
region.

Despite this, the driver was mapping up to 0x30000 bytes (three DRV
regions) via a QCOM_PDC_SIZE clamp introduced as a workaround for old
sm8150 DTs that described a too-small register window. Correspondingly,
most platform DTS files described the PDC reg as 0x30000 in size, and
several also carried a second, entirely unused reg entry pointing at an
unrelated register region that the driver never maps.

This series cleans all of that up in three logical steps:

1. (patches 2-6):

Split __pdc_enable_intr() into two focused per-version helpers
to separate the HW < 3.2 bank-based path from the HW >= 3.2 per-pin
path. Replace the pdc_version global with a function pointer assigned
once at probe time, moving the version check out of the hot path.
Tighten the ioremap clamp from QCOM_PDC_SIZE (0x30000) to PDC_DRV_SIZE
(0x10000) now that the DT fixes below make the workaround unnecessary.
Also add a PDC_VERSION() constructor macro and use FIELD_GET() for bank
index extraction to make the bit encoding self-documenting.

2. (patches 1, 7-28):

All 28 platform DTS files that described the PDC reg window as 0x30000
are corrected to 0x10000, reflecting the single APSS DRV region that
Linux actually maps.

3. (patches 29-35):

Seven platform DTS files (kaanapali, lemans, milos, monaco, sc8280xp,
sdx75, talos) carried a second reg entry pointing at an unrelated
hardware block. The driver only ever calls of_address_to_resource(node,
0, ...) so this second entry was never mapped or accessed. Remove it.

The net result is that every PDC node in the tree now describes exactly
one register region of exactly 0x10000 bytes — the APSS DRV region that
the driver actually uses — and the driver's ioremap clamp matches that
reality.

Mukesh Ojha (35):
  dt-bindings: qcom,pdc: Tighten reg to single APSS DRV region
  irqchip/qcom-pdc: Split __pdc_enable_intr() into per-version helpers
  irqchip/qcom-pdc: Tighten ioremap clamp to single DRV region size
  irqchip/qcom-pdc: Replace pdc_version global with a function pointer
  irqchip/qcom-pdc: Add PDC_VERSION() macro to describe version register
    fields
  irqchip/qcom-pdc: Use FIELD_GET() to extract bank index and bit
    position
  arm64: dts: qcom: sdm845: Fix PDC reg size to single APSS DRV region
  arm64: dts: qcom: sdm670: Fix PDC reg size to single APSS DRV region
  arm64: dts: qcom: sc7180: Fix PDC reg size to single APSS DRV region
  arm64: dts: qcom: sc7280: Fix PDC reg size to single APSS DRV region
  arm64: dts: qcom: sc8180x: Fix PDC reg size to single APSS DRV region
  arm64: dts: qcom: sm8150: Fix PDC reg size to single APSS DRV region
  arm64: dts: qcom: sc8280xp: Fix PDC reg size to single APSS DRV region
  arm64: dts: qcom: sm8250: Fix PDC reg size to single APSS DRV region
  arm64: dts: qcom: sm8350: Fix PDC reg size to single APSS DRV region
  arm64: dts: qcom: sm8450: Fix PDC reg size to single APSS DRV region
  arm64: dts: qcom: sm8550: Fix PDC reg size to single APSS DRV region
  arm64: dts: qcom: sm8650: Fix PDC reg size to single APSS DRV region
  arm64: dts: qcom: sm4450: Fix PDC reg size to single APSS DRV region
  arm64: dts: qcom: x1e80100: Fix PDC reg size to single APSS DRV region
  arm64: dts: qcom: sm6350: Fix PDC reg size to single APSS DRV region
  arm64: dts: qcom: sar2130p: Fix PDC reg size to single APSS DRV region
  arm64: dts: qcom: qcs615: Fix PDC reg size to single APSS DRV region
  arm64: dts: qcom: qcs8300: Fix PDC reg size to single APSS DRV region
  arm64: dts: qcom: sa8775p: Fix PDC reg size to single APSS DRV region
  arm64: dts: qcom: sdx75: Fix PDC reg size to single APSS DRV region
  arm64: dts: qcom: milos: Fix PDC reg size to single APSS DRV region
  arm64: dts: qcom: qdu1000: Fix PDC reg size to single APSS DRV region
  arm64: dts: qcom: kaanapali: Drop unused second PDC reg entry
  arm64: dts: qcom: lemans: Drop unused second PDC reg entry
  arm64: dts: qcom: milos: Drop unused second PDC reg entry
  arm64: dts: qcom: monaco: Drop unused second PDC reg entry
  arm64: dts: qcom: sc8280xp: Drop unused second PDC reg entry
  arm64: dts: qcom: sdx75: Drop unused second PDC reg entry
  arm64: dts: qcom: talos: Drop unused second PDC reg entry

 .../interrupt-controller/qcom,pdc.yaml        |  2 +-
 arch/arm64/boot/dts/qcom/hamoa.dtsi           |  2 +-
 arch/arm64/boot/dts/qcom/kaanapali.dtsi       |  3 +-
 arch/arm64/boot/dts/qcom/kodiak.dtsi          |  2 +-
 arch/arm64/boot/dts/qcom/lemans.dtsi          |  3 +-
 arch/arm64/boot/dts/qcom/milos.dtsi           |  3 +-
 arch/arm64/boot/dts/qcom/monaco.dtsi          |  3 +-
 arch/arm64/boot/dts/qcom/qdu1000.dtsi         |  2 +-
 arch/arm64/boot/dts/qcom/sar2130p.dtsi        |  2 +-
 arch/arm64/boot/dts/qcom/sc7180.dtsi          |  2 +-
 arch/arm64/boot/dts/qcom/sc8180x.dtsi         |  2 +-
 arch/arm64/boot/dts/qcom/sc8280xp.dtsi        |  2 +-
 arch/arm64/boot/dts/qcom/sdm670.dtsi          |  2 +-
 arch/arm64/boot/dts/qcom/sdm845.dtsi          |  2 +-
 arch/arm64/boot/dts/qcom/sdx75.dtsi           |  3 +-
 arch/arm64/boot/dts/qcom/sm4450.dtsi          |  2 +-
 arch/arm64/boot/dts/qcom/sm6350.dtsi          |  2 +-
 arch/arm64/boot/dts/qcom/sm8150.dtsi          |  2 +-
 arch/arm64/boot/dts/qcom/sm8250.dtsi          |  2 +-
 arch/arm64/boot/dts/qcom/sm8350.dtsi          |  2 +-
 arch/arm64/boot/dts/qcom/sm8450.dtsi          |  2 +-
 arch/arm64/boot/dts/qcom/sm8550.dtsi          |  2 +-
 arch/arm64/boot/dts/qcom/sm8650.dtsi          |  2 +-
 arch/arm64/boot/dts/qcom/talos.dtsi           |  3 +-
 drivers/irqchip/qcom-pdc.c                    | 56 +++++++++++--------
 25 files changed, 57 insertions(+), 53 deletions(-)

-- 
2.53.0