Re: [PATCH 2/6] dt-bindings: pinctrl: Document Tegra238 pin controllers
From: Krzysztof Kozlowski
Date: Fri Apr 10 2026 - 07:00:55 EST
On Thu, Apr 09, 2026 at 01:13:36PM +0000, pshete@xxxxxxxxxx wrote:
> +patternProperties:
> + "^pinmux(-[a-z0-9-]+)?$":
> + type: object
> +
> + # pin groups
> + additionalProperties:
> + $ref: nvidia,tegra238-pinmux-common.yaml
> +
> + properties:
> + nvidia,pins:
> + items:
> + enum: [ bootv_ctl_n_paa0, soc_gpio00_paa1, vcomp_alert_paa2,
> + pwm1_paa3, batt_oc_paa4, soc_gpio04_paa5,
> + soc_gpio25_paa6, soc_gpio26_paa7,
> + hdmi_cec_pbb0,
> + spi2_sck_pcc0, spi2_miso_pcc1, spi2_mosi_pcc2,
> + spi2_cs0_pcc3, spi2_cs1_pcc4, uart3_tx_pcc5,
> + uart3_rx_pcc6, gen2_i2c_scl_pcc7,
> + gen2_i2c_sda_pdd0, gen8_i2c_scl_pdd1,
> + gen8_i2c_sda_pdd2, touch_clk_pdd3, dmic1_clk_pdd4,
> + dmic1_dat_pdd5, soc_gpio19_pdd6, pwm2_pdd7,
> + pwm3_pee0, pwm7_pee1,
> + # drive groups (ordered PAA, PBB, PCC, PDD, PEE)
> + drive_bootv_ctl_n_paa0, drive_soc_gpio00_paa1,
> + drive_vcomp_alert_paa2, drive_pwm1_paa3,
> + drive_batt_oc_paa4, drive_soc_gpio04_paa5,
> + drive_soc_gpio25_paa6, drive_soc_gpio26_paa7,
> + drive_hdmi_cec_pbb0,
> + drive_spi2_sck_pcc0, drive_spi2_miso_pcc1,
> + drive_spi2_mosi_pcc2, drive_spi2_cs0_pcc3,
> + drive_spi2_cs1_pcc4, drive_uart3_tx_pcc5,
> + drive_uart3_rx_pcc6, drive_gen2_i2c_scl_pcc7,
> + drive_gen2_i2c_sda_pdd0, drive_gen8_i2c_scl_pdd1,
> + drive_gen8_i2c_sda_pdd2, drive_touch_clk_pdd3,
> + drive_dmic1_clk_pdd4, drive_dmic1_dat_pdd5,
> + drive_soc_gpio19_pdd6, drive_pwm2_pdd7,
> + drive_pwm3_pee0, drive_pwm7_pee1 ]
> +
> +unevaluatedProperties: false
additionalProperties. I'll fix existing files.
> +
> +examples:
> + - |
Best regards,
Krzysztof