Re: [PATCH 11/24] serial: 8250: cap OxSemi Tornado UART count against BAR size

[Cameron Williams]

On 27/10/2026 14:29, Maciej W. Rozycki wrote:
>   So I think overall this ought to look like (unchecked):
>
> static int pci_oxsemi_tornado_init(struct pci_dev *dev)
> {
> 	u8 __iomem *p;
> 	unsigned long deviceID;
> 	int number_uarts = -ENXIO;
>
> 	if (!pci_oxsemi_tornado_p(dev) || pci_resource_len(dev, 0) < 8)
> 		return -ENXIO;
>
> 	p = pci_iomap(dev, 0, 5);
> 	if (p == NULL)
> 		return -ENOMEM;
>
> 	deviceID = ioread32(p);
> 	/* Tornado device */
> 	if (deviceID == 0x07000200) {
> 		number_uarts = ioread8(p + 4);
> 		pci_dbg(dev, "%d ports detected on %s PCI Express device\n",
> 			number_uarts,
> 			dev->vendor == PCI_VENDOR_ID_ENDRUN ?
> 			"EndRun" : "Oxford");
> 		if (number_uarts < 1)
> 			number_uarts = -ENXIO;
> 	}
> 	pci_iounmap(dev, p);
> 	return number_uarts;
> }
>
> with the FL_REGION_SZ_CAP flag set for the relevant entries, and possibly
> setting ->num_ports to 0 too since we need to determine that at run time.
>
>   Not sure how this interferes with Brainboxes devices, support for which
> seems not to have been fully merged given that pci_oxsemi_tornado_p() does
> not let PCI_VENDOR_ID_INTASHIELD devices through.  Cameron?

The Oxford cards all work even though not explicitly mentioned in 
pci_oxsemi_tornado_p(). The cards all report 16K for BAR0, so I would 
assume this patch should not cause any issues?
See lspci -nnvvv output below for a 4-port card (PX-420). This should be 
OK? Thanks for checking in.

02:00.0 Serial controller [0700]: Brainboxes Ltd PX-420 3 + 1 port 
RS-232 card [135a:4011] (rev 02) (prog-if 06 [16950])
        Subsystem: Brainboxes Ltd PX-420 3 + 1 port RS-232 card [135a:4011]
        Control: I/O- Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- 
ParErr- Stepping- SERR- FastB2B- DisINTx-
        Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- 
<TAbort- <MAbort- >SERR- <PERR- INTx-
        Interrupts: pin B routed to IRQ 16
        IOMMU group: 12
        Region 0: Memory at 70800000 (32-bit, non-prefetchable) [size=16K]
        Region 1: Memory at 70600000 (32-bit, non-prefetchable) [size=2M]
        Region 2: Memory at 70400000 (32-bit, non-prefetchable) [size=2M]
        Capabilities: [40] Power Management version 3
                Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=55mA 
PME(D0-,D1+,D2+,D3hot+,D3cold-)
                Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
        Capabilities: [70] Express (v1) Endpoint, IntMsgNum 0
                DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s 
<128ns, L1 <2us
                        ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset- 
SlotPowerLimit 25W TEE-IO-
                DevCtl: CorrErr- NonFatalErr- FatalErr- UnsupReq-
                        RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop-
                        MaxPayload 128 bytes, MaxReadReq 512 bytes
                DevSta: CorrErr- NonFatalErr- FatalErr- UnsupReq- 
AuxPwr+ TransPend-
                LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, 
Exit Latency L0s unlimited, L1 unlimited
                        ClockPM+ Surprise- LLActRep- BwNot- ASPMOptComp-
                LnkCtl: ASPM Disabled; RCB 64 bytes, LnkDisable- CommClk+
                        ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt- 
FltModeDis-
                LnkSta: Speed 2.5GT/s, Width x1
                        TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
        Capabilities: [b0] MSI-X: Enable- Count=16 Masked-
                Vector table: BAR=1 offset=001b3000
                PBA: BAR=1 offset=001b2000
        Capabilities: [100 v1] Device Serial Number 00-30-e0-11-11-00-02-00
        Capabilities: [110 v1] Power Budgeting <?>
        Kernel driver in use: serial
        Kernel modules: 8250_pci

>   NB BAR0 size is 16k by the spec and the maximum # of UARTs is 16, for a
> dual-OXPCIe958 master/slave setup, still leaving 4k of the available space
> unoccupied.
>
>    Maciej

Acked-by: Cameron Williams <cang1@xxxxxxxxxx>