Re: [PATCH RESEND v2] x86/early-quirks: Scan all functions in early_pci_scan_bus()

[H. Peter Anvin]

On October 25, 2026 1:07:28 AM PDT, "Maciej W. Rozycki" <macro@xxxxxxxxxxx> wrote:
>On Mon, 12 Oct 2026, Thorsten Blum wrote:
>
>> Is there anything else I can do to help get this queued?
>
> FWIW, it's not unusual even if not common for multifunction devices to 
>have "holes" in functions, e.g.:
>
>07:00.0 Parallel controller [0701]: Oxford Semiconductor Ltd OXPCIe952 Parallel Port [1415:c118]
>07:00.3 Serial controller [0700]: Oxford Semiconductor Ltd OXPCIe952 Native 950 UART [1415:c11b]
>
>which is a chip the functions of which (one or two native or legacy serial 
>ports, one parallel port, one GPIO interface) can be activated selectively 
>with reset straps, however the resulting numeric 0-3 function assignments 
>for individual interfaces are not necessarily contiguous, presumably to 
>simplify internal decoding logic.
>
>  Maciej

Indeed, or there might be multiple versions of a chip with different feature sets – often the same physical chip in different packages, so some features are fused or strapped off because they aren't pinned out.

The assumption that a multifunction service will have all its functions contiguous is absolutely false.

Acked-by: H. Peter Anvin (Rosaic) <hpa@xxxxxxxxx>