[PATCH v1] drm/bridge: ssd2825: Fix panel enable sequence

From: Svyatoslav Ryhel

Date: Sun Oct 25 2026 - 09:38:23 EST


Currently, in the case of a single bridge and a single panel, the DRM
framework calls panel prepare() > bridge pre_enable() > bridge enable() >
panel enable(). While this is fine for most cases, the SSD2825 requires
the last two steps to be swapped. There is no meaningful way to achieve
this using standard bridge chain configuration, so the bridge previously
called panel_enable() directly at the end of its pre_enable() hook to
gain fine-grained control over the sequence.

Commit 554d36acf5e0 ("drm/bridge: ssd2825: don't create a panel_bridge")
removed this call, resulting in a regression where display output is
missing because the panel enable function is now called after the bridge
completes its configuration.

Since panels are now automatically wrapped into the bridge framework,
invoke the next bridge's atomic enable directly, similar to how panel
enabling was handled previously.

This restores panel support on the LG Optimus 4X HD (P880) and
Optimus Vu (P895).

Fixes: 554d36acf5e0 ("drm/bridge: ssd2825: don't create a panel_bridge")
Signed-off-by: Svyatoslav Ryhel <clamor95@xxxxxxxxx>
---
drivers/gpu/drm/bridge/ssd2825.c | 9 +++++++++
1 file changed, 9 insertions(+)

diff --git a/drivers/gpu/drm/bridge/ssd2825.c b/drivers/gpu/drm/bridge/ssd2825.c
index 71877699dfab6..9216cee09115f 100644
--- a/drivers/gpu/drm/bridge/ssd2825.c
+++ b/drivers/gpu/drm/bridge/ssd2825.c
@@ -475,6 +475,7 @@ static void ssd2825_bridge_atomic_pre_enable(struct drm_bridge *bridge,
struct drm_atomic_commit *state)
{
struct ssd2825_priv *priv = bridge_to_ssd2825(bridge);
+ struct drm_bridge *next_bridge = priv->output.bridge;
struct mipi_dsi_device *dsi_dev = priv->output.dev;
const struct drm_crtc_state *crtc_state;
const struct drm_display_mode *mode;
@@ -569,6 +570,14 @@ static void ssd2825_bridge_atomic_pre_enable(struct drm_bridge *bridge,
/* Initial DSI configuration register set */
ssd2825_write_reg(priv, SSD2825_CONFIGURATION_REG, config);
ssd2825_write_reg(priv, SSD2825_VC_CTRL_REG, 0);
+
+ /*
+ * The SSD2825 requires that the next bridge be enabled first;
+ * otherwise, the SSD2825 cannot complete its configuration and
+ * there will be no output.
+ */
+ if (next_bridge->funcs && next_bridge->funcs->atomic_enable)
+ next_bridge->funcs->atomic_enable(next_bridge, state);
}

static void ssd2825_bridge_atomic_enable(struct drm_bridge *bridge,
--
2.53.0