Re: [PATCH v3 1/2] riscv: dts: spacemit: k1: mark boot-critical SoC nodes bootph-pre-ram

[Anand Moon]

Hi Hung-Chun,

On Sat, 24 Oct 2026 at 14:57, Hung-Chun Tseng <alan.tseng.cs@xxxxxxxxx> wrote:
>
> The K1 BootROM loads the next boot stage from SD, eMMC or SPI NOR into
> SRAM, and that stage brings up DRAM. To do so it needs the fixed clocks,
> the clock and reset controllers, the console UART, the boot media
> controllers (sdhci0, eMMC and QSPI), and two I2C buses that every K1
> board wires the same way: i2c2 to the EEPROM that holds the DRAM
> configuration, and i2c8 to the PMIC that supplies the SoC.
>
> Mark these nodes bootph-pre-ram, the phase that sets up SDRAM.
>
> Reviewed-by: E Shattow <e@xxxxxxxxxxxx>
> Signed-off-by: Hung-Chun Tseng <alan.tseng.cs@xxxxxxxxx>

Thanks for these changes. It helped me a lot.

Could you update the pinctrl and GPIO configurations, including all
necessary pin
assignments, to bring up the SD card, PCIe, and Ethernet nodes?

Please ensure that the required bootph-pre-ram properties are applied
to the relevant
pinctrl, GPIO, and other dependent nodes wherever necessary for SD card boot and
SPL initialization.

Additionally, could you update the regulator-name properties for
vdd_core, vdd_1v8,
and vdd_1v8_mmc?  On all the boards, the SPL code requires these regulator names
to locate and enable the corresponding regulators during early boot.

I am verifying the changes against the existing U-Boot board device
tree and configuration to ensure
that SD card, eMMC, PCIe, and Ethernet initialization work correctly.

Thanks
-Anand