[PATCH 1/2] dt-bindings: display: msm: sm6115-mdss: Add missing AHB clock

[Michael McAllister]

MDSS register access requires the AHB clock supplied by DISPCC, in
addition to the GCC bus clocks and the MDP core clock already listed.
The DPU child also uses this clock, but MDSS needs it before the child
resumes so that it can access its own registers.

Add the missing clock to the end of the list and update the example.
Keep the existing three-clock descriptions valid for compatibility with
older device trees.

Fixes: b93bdff44a85 ("dt-bindings: display/msm: add support for SM6115")

Signed-off-by: Michael McAllister <me@xxxxxxxxxxxxxxxxxxxxx>
---
 .../devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml    | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml
index 309de1953..d4fac93d9 100644
--- a/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml
@@ -21,10 +21,12 @@ properties:
     const: qcom,sm6115-mdss
 
   clocks:
+    minItems: 3
     items:
       - description: Display AHB clock from gcc
       - description: Display AXI clock
       - description: Display core clock
+      - description: Display AHB clock from dispcc
 
   iommus:
     maxItems: 2
@@ -92,7 +94,8 @@ examples:
         power-domains = <&dispcc MDSS_GDSC>;
         clocks = <&gcc GCC_DISP_AHB_CLK>,
                  <&gcc GCC_DISP_HF_AXI_CLK>,
-                 <&dispcc DISP_CC_MDSS_MDP_CLK>;
+                 <&dispcc DISP_CC_MDSS_MDP_CLK>,
+                 <&dispcc DISP_CC_MDSS_AHB_CLK>;
 
         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
         interrupt-controller;