Re: [PATCH v1 5/8] dt-bindings: pinctrl: Add starfive,jhb100-emmc-pinctrl

[Linus Walleij]

On Sat, Oct 17, 2026 at 7:26 AM Changhuang Liang
<changhuang.liang@xxxxxxxxxxxxxxxx> wrote:

> +  Pinctrl bindings for JHB100 RISC-V SoC from StarFive Technology Ltd.
> +
> +  The JHB100 SoC has 13 pinctrl domains - sys0, sys0h, sys1, sys2, per0, per1,
> +  per2, per2pok, per3, adc0, adc1, emmc, and vga.
> +  This document provides an overview of the "emmc" pinctrl domain.

I noticed in the pull request to Torvalds that this is a first, usually
the SoCs have one pin controller, or two (like Qualcomms TLMM
and LPASS).

But this one has 13...

Your silicon people are obviously thinking differently from everyone
else with this distributed pin controller model. If you know something
about the thinking going on here I'd be curious.

Yours,
Linus Walleij