RE: [PATCH v5 0/9] Add Aspeed AST2700 SDRAM EDAC support

[Ryan Chen]

Hello Boris,
	Just a gentle ping on this series.
	Any feedback would be appreciated.
	Please let me know if there is anything I should address or revise.

Ryan


> Subject: [PATCH v5 0/9] Add Aspeed AST2700 SDRAM EDAC support
> 
> Add ECC error reporting for the Aspeed AST2700 SoC to the existing
> aspeed_edac driver.
> 
> The AST2700 memory controller keeps the same overall EDAC programming
> model as the earlier Aspeed BMC SoCs, but uses a different register layout, a
> split interrupt status/clear/mask scheme and DDR4/DDR5 memory.
> Rather than fork the driver, the existing code is first tidied and generalised,
> then the AST2700 is added as one more per-SoC variant.
> 
> Patches 1-4 are bug fixes and cleanups to the existing driver. Patch 5
> documents the AST2700 binding, patches 6 and 7 rework the implementation
> to accommodate it, and patch 8 adds the AST2700 support itself. Patch 9 is
> Stefan's step-down patch, amended to leave the entry in place with me as its
> reviewer.
> 
> Signed-off-by: Ryan Chen <ryan_chen@xxxxxxxxxxxxxx>
> ---
> Changes in v5:
> - Register the ECC interrupt with request_irq() instead of
>   devm_request_irq() followed by an explicit free, and keep the
>   interrupt number alongside the driver's other state so
>   aspeed_remove() does not have to call platform_get_irq() again.
> - Link to v4:
> https://lore.kernel.org/r/20260930-edac-v4-0-c2e526f3ed79@xxxxxxxxxxxxxx
> 
> Changes in v4:
> - Put the bug fixes first: the two fixes are now patches 1 and 2, the
>   cleanups 3 and 4, and the bindings patch moves to 5 ahead of the
>   AST2700 work.
> - Explain in patch 1 where the grain value comes from, rather than the
>   warning it silences.
> - Drop the Cc: stable tags from the two fixes. Neither meets the bar in
>   Documentation/process/stable-kernel-rules.rst; the Fixes: tags stay.
> - Merge Stefan's step-down patch into patch 9, keeping the MAINTAINERS
>   entry alive with a reviewer instead of removing it.
> - Link to v3:
> https://lore.kernel.org/r/20260916-edac-v3-0-23e9ed2fbdf9@xxxxxxxxxxxxxx
> 
> Changes in v3:
> - Establish the AST2700 interrupt mask in the driver rather than
>   deriving it from the register's contents: ast2700_set_irq() now
>   writes the mask outright, masking every source and unmasking only
>   the ECC ones, and the mask is established before the interrupt is
>   requested.
> - New patch: add myself as a reviewer for the driver in MAINTAINERS.
> - Tested on an AST2600 with CONFIG_PROVE_LOCKING=y; injected correctable
>   errors are reported from the interrupt handler with no lockdep reports.
> - Link to v2:
> https://lore.kernel.org/r/20260824-edac-v2-0-c8d8bb693586@xxxxxxxxxxxxx
> m
> 
> Changes in v2:
> - New patch: free the ECC interrupt before the mem_ctl_info in
>   aspeed_remove(). The interrupt is requested with devm_request_irq() and
>   is only released after .remove() has returned, so edac_mc_free() could
>   free the handler's context while the handler was still running on
>   another CPU.
> - Acquire the register lock with the irqsave variant in init_csrows() and
>   in aspeed_probe(). The interrupt handler takes the same lock in hardirq
>   context.
> - Move the dev_dbg() of the interrupt status register out of the
>   raw_spinlock critical section in the interrupt handler.
> - Opt aspeed_edac.o into context analysis in drivers/edac/Makefile. The
>   check is opt-in per object, so without it the __guarded_by() annotation
>   added by the same patch was never actually verified.
> - Return IRQ_NONE from ast2700_dramc_isr() when no ECC interrupt status
>   bit is set; the handler clears only the ECC bits, so unconditionally
>   claiming the interrupt could livelock the level-triggered line.
> - Tested v2 on both AST2600 and AST2700 by injecting a correctable
>   error with the memory controller's ECC error injection; each is
>   reported as a CE with the expected failure address.
> - Link to v1:
> https://lore.kernel.org/r/20260812-edac-v1-0-03992edea297@xxxxxxxxxxxxx
> m
> 
> ---
> Ryan Chen (8):
>       EDAC/aspeed: Set the DIMM grain
>       EDAC/aspeed: Free the interrupt before the mem_ctl_info on remove
>       EDAC/aspeed: Clean up whitespace and include ordering
>       EDAC/aspeed: Free the mem_ctl_info unconditionally on remove
>       dt-bindings: edac: aspeed: Add AST2700 SDRAM EDAC
>       EDAC/aspeed: Replace regmap with direct register access
>       EDAC/aspeed: Abstract SoC differences behind chip data
>       EDAC/aspeed: Add AST2700 support
> 
> Stefan M Schaeckeler (1):
>       MAINTAINERS: Step down as Aspeed AST2500 EDAC driver maintainer
> 
>  CREDITS                                            |   8 +
>  .../bindings/edac/aspeed,ast2400-sdram-edac.yaml   |   8 +-
>  MAINTAINERS                                        |   2 +-
>  drivers/edac/Makefile                              |   1 +
>  drivers/edac/aspeed_edac.c                         | 425
> ++++++++++++++-------
>  5 files changed, 293 insertions(+), 151 deletions(-)
> ---
> base-commit: 5464985e42c04e335fb30e38fbc409c997db9bec
> change-id: 20260625-edac-8e960e02e7f7
> 
> Best regards,
> --
> Ryan Chen <ryan_chen@xxxxxxxxxxxxxx>