Re: [PATCH v6 2/3] EDAC/cadence: Add Cadence DDR EDAC driver

[Paul Louvel]

Hello,

On Mon Oct 19, 2026 at 4:21 PM CEST, Geert Uytterhoeven wrote:
> Hi Paul,
>
> On Tue, 13 Oct 2026 at 12:45, Paul Louvel <paul.louvel@xxxxxxxxxxx> wrote:
>> Add the Cadence EDAC driver found on Renesas RZ/N1x SoC.
>> The memory controller supports ECC, software scrubbing, and SECDED.
>>
>> Signed-off-by: Paul Louvel (Schneider Electric) <paul.louvel@xxxxxxxxxxx>
>
> Thanks for the update!
>
>> --- /dev/null
>> +++ b/drivers/edac/cadence_edac.c
>
>> +static const struct of_device_id cdns_ddr_ctrl_of_match[] = { { .compatible = "cdns,ddr-edac" },
>> +                                                             {} };
>
> Why this weird formatting?

Clang-format shenanigans.. It will be fixed in the next iteration (coming
today).

>
>> +MODULE_DEVICE_TABLE(of, cdns_ddr_ctrl_of_match);
>
> Gr{oetje,eeting}s,
>
>                         Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                 -- Linus Torvalds

Best regards,
-- 
Paul Louvel, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com