[PATCH 2/2] spi: ti-qspi: handle setup clock runtime resume failure

[Jiale Yao]

ti_qspi_setup_clk() writes controller registers after an unchecked
pm_runtime_resume_and_get() call. Runtime resume can fail, leaving the
controller unavailable while the helper continues with the register
access and later drops a reference that was not acquired.

Return the runtime resume error from the helper and propagate it through
the memory-map and transfer paths before any clock register access.

Fixes: 8d0b512844fd ("spi: spi-ti-qspi: Support per-transfer and per-slave speed_hz settings")
Signed-off-by: Jiale Yao <yaojiale02@xxxxxxx>
---
 drivers/spi/spi-ti-qspi.c | 21 ++++++++++++++++-----
 1 file changed, 16 insertions(+), 5 deletions(-)

diff --git a/drivers/spi/spi-ti-qspi.c b/drivers/spi/spi-ti-qspi.c
index 34b154922ff2..5851574a4292 100644
--- a/drivers/spi/spi-ti-qspi.c
+++ b/drivers/spi/spi-ti-qspi.c
@@ -167,10 +167,10 @@ static int ti_qspi_setup(struct spi_device *spi)
 	return 0;
 }
 
-static void ti_qspi_setup_clk(struct ti_qspi *qspi, u32 speed_hz)
+static int ti_qspi_setup_clk(struct ti_qspi *qspi, u32 speed_hz)
 {
 	struct ti_qspi_regs *ctx_reg = &qspi->ctx_reg;
-	int clk_div;
+	int clk_div, ret;
 	u32 clk_ctrl_reg, clk_rate, clk_ctrl_new;
 
 	clk_rate = clk_get_rate(qspi->fclk);
@@ -178,7 +178,9 @@ static void ti_qspi_setup_clk(struct ti_qspi *qspi, u32 speed_hz)
 	clk_div = clamp(clk_div, 0, QSPI_CLK_DIV_MAX);
 	dev_dbg(qspi->dev, "hz: %d, clock divider %d\n", speed_hz, clk_div);
 
-	pm_runtime_resume_and_get(qspi->dev);
+	ret = pm_runtime_resume_and_get(qspi->dev);
+	if (ret < 0)
+		return ret;
 
 	clk_ctrl_new = QSPI_CLK_EN | clk_div;
 	if (ctx_reg->clkctrl != clk_ctrl_new) {
@@ -195,6 +197,8 @@ static void ti_qspi_setup_clk(struct ti_qspi *qspi, u32 speed_hz)
 	}
 
 	pm_runtime_put_autosuspend(qspi->dev);
+
+	return 0;
 }
 
 static void ti_qspi_restore_ctx(struct ti_qspi *qspi)
@@ -621,7 +625,9 @@ static int ti_qspi_exec_mem_op(struct spi_mem *mem,
 	mutex_lock(&qspi->list_lock);
 
 	if (!qspi->mmap_enabled || qspi->current_cs != spi_get_chipselect(mem->spi, 0)) {
-		ti_qspi_setup_clk(qspi, op->max_freq);
+		ret = ti_qspi_setup_clk(qspi, op->max_freq);
+		if (ret)
+			goto unlock;
 		ti_qspi_enable_memory_map(mem->spi);
 	}
 	ti_qspi_setup_mmap_read(mem->spi, op->cmd.opcode, op->data.buswidth,
@@ -646,6 +652,7 @@ static int ti_qspi_exec_mem_op(struct spi_mem *mem,
 			      op->data.nbytes);
 	}
 
+unlock:
 	mutex_unlock(&qspi->list_lock);
 
 	return ret;
@@ -704,7 +711,11 @@ static int ti_qspi_start_transfer_one(struct spi_controller *host,
 		wlen = t->bits_per_word >> 3;
 		transfer_len_words = min(t->len / wlen, frame_len_words);
 
-		ti_qspi_setup_clk(qspi, t->speed_hz);
+		ret = ti_qspi_setup_clk(qspi, t->speed_hz);
+		if (ret) {
+			mutex_unlock(&qspi->list_lock);
+			return ret;
+		}
 		ret = qspi_transfer_msg(qspi, t, transfer_len_words * wlen);
 		if (ret) {
 			dev_dbg(qspi->dev, "transfer message failed\n");
-- 
2.34.1