[PATCH v2 01/23] arm64/sysreg: Define TRBSR_EL1.EC event classes

[Leo Yan]

TRBSR_EL1.EC identifies the cause of a trace buffer management event,
but the sysreg description does not name its architected values. Define
the five encodings as an unsigned enum so TRBE status handling can
refer to each cause by name.

The values cover other events, Granule Protection Check faults,
implementation-defined events, and stage 1 and stage 2 Data Aborts on
writes to the trace buffer, as specified by Arm ARM (ARM DDI 0487 M.c).

Signed-off-by: Leo Yan <leo.yan@xxxxxxx>
---
 arch/arm64/tools/sysreg | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index 94bf065c8ac71f20f482c91a5147cb6e001dfba2..f68c23dd4e83ee4d00610e097d9188d3a2c9ed15 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -5834,7 +5834,13 @@ EndSysreg
 Sysreg	TRBSR_EL1	3	0	9	11	3
 Res0	63:56
 Field	55:32	MSS2
-Field	31:26	EC
+UnsignedEnum	31:26	EC
+	0b000000	OTHER
+	0b011110	FAULT_GPC
+	0b011111	IMP_DEF
+	0b100100	FAULT_WRITE_S1
+	0b100101	FAULT_WRITE_S2
+EndEnum
 Res0	25:24
 Field	23	DAT
 Field	22	IRQ

-- 
2.34.1