Re: [PATCH RFC v2 0/4] phy: qcom-mipi-csi2: C-PHY for X1E80100
From: Bryan O'Donoghue
Date: Fri Oct 16 2026 - 07:02:34 EST
On 16/10/2026 11:57, George Neacsu via B4 Relay wrote:
Hi Bryan, Vinod, David,
Small point of order here - this is not really @ RFC status.
Don't resend but an RFC contains stuff you don't really expect to be merged. OTOH you're basically submitting this series for inclusion => !RFC.
The Snapdragon Surface Pro 11's front camera, an IMX681, is on CSIPHY2
over one MIPI C-PHY trio. linux-next has the CSI2 PHY driver and the CAMSS
PHY API path, and C-PHY is the piece still missing for this camera. This
series adds the PHY side:
1. PHY_MODE_MIPI_CPHY and C-PHY configuration options in the generic PHY
framework, because CAMSS had no way to ask the PHY for C-PHY;
2. C-PHY configuration helpers, the analogue of
phy_mipi_dphy_get_default_config_for_hsclk();
3. a rename of the D-PHY init sequence in qcom-mipi-csi2;
4. C-PHY in qcom-mipi-csi2, with the X1E80100 sequence taken from
Qualcomm's GPL-2.0 downstream header.
v2 is on next-20261015 and applies there on its own. The two CAMSS
patches from v1 (the CSID 680 PHY type select, and C-PHY in
csiphy_stream_on()) build on David's "media: camss: Add support for C-PHY
configuration on Qualcomm platforms" v9, which is not in linux-next yet,
so I have left them out and will send them on top of David's series:
https://lore.kernel.org/all/20260617-qcom-cphy-v9-0-83da8a8e4e44@xxxxxxx/
Tested on the Surface Pro 11 (X1E80100) with David's v9 and those two
patches on top, through the upstream stack: CSI2 PHY nodes as in Bryan's
x1e80100 camera DT v7, and CAMSS in PHY API mode, with raw capture over
RDI:
- front IMX681 (Sergey's and Andre's v8 driver plus its C-PHY RFC) on
CSIPHY2, one C-PHY trio at 2.4 Gsym/s: 3844x2640 at 30 fps, and the
sensor's colour bars are byte-identical to the pattern captured with an
out-of-tree driver. The settle count is now computed (28 at a 400 MHz
timer), and any value from 6 to 48 gives the same frames;
- rear OV13858 on CSIPHY1, four D-PHY lanes: 29.9 fps with the same
settle count as before the series.
The kernel was 7.1.5, with linux-next's CAMSS and CSI2 PHY built as
modules; the test build needed shims only for API differences.
What's this ?
"It builds" I can verify myself, "it works" is the thing. Just slow down and get something you can test on hardware.
Open question, from Nihal: the X1E table is Qualcomm's 2.5 Gsps one, and---
downstream picks C-PHY settings by symbol rate. I would keep a single
table here and add selection by rate when a second rate is needed,
unless you would rather have the structure now.
bod