Re: [PATCH 2/3] arm64: dts: qcom: sm8650: Add watchdog node

[Neil Armstrong]

On 10/13/26 11:21, Konrad Dybcio wrote:
> On 10/2/26 11:45 AM, Neil Armstrong wrote:
> > Add a node for the watchdog on the SM8650 SoC, the node
> > is marked as reserved since on most platforms the Watchdog
> > is owned by the Gunyah Hypervisor.
> >
> > Signed-off-by: Neil Armstrong <neil.armstrong@xxxxxxxxxx>
> > ---
>
> Do you have a HDK or something with gunyah at hand? A couple months
> ago qcom_scm_gunyah_wdt_init() was introduced to handle this -
> could you enable the node and give it a shot if you have one?

Why enabling the node ? the qcom_scm_gunyah_wdt_init() will bail out
if the node is enabled. Here we only want the node to be enabled when
we are in EL1 without Gunyah.

Neil

> Konrad
>
> >   arch/arm64/boot/dts/qcom/sm8650.dtsi | 8 ++++++++
> >   1 file changed, 8 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> > index 86fbb0fd6472..f33ed7909a8e 100644
> > --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> > @@ -7311,6 +7311,14 @@ gic_its: msi-controller@17140000 {
> >   			};
> >   		};
> >   
> > +		watchdog: watchdog@17411000 {
> > +			compatible = "qcom,apss-wdt-sm8650", "qcom,kpss-wdt";
> > +			reg = <0 0x17411000 0 0x1000>;
> > +			clocks = <&sleep_clk>;
> > +			interrupts = <GIC_SPI 0 IRQ_TYPE_EDGE_RISING 0>;
> > +			status = "reserved"; /* Owned by hypervisor */
> > +		};
> > +
> >   		timer@17420000 {
> >   			compatible = "arm,armv7-timer-mem";
> >   			reg = <0 0x17420000 0 0x1000>;