[PATCH v2 11/14] arm64: dts: exynos8855: add cmu_top & cmu_peric clock DT nodes

From: Raghav Sharma

Date: Fri Oct 09 2026 - 07:54:41 EST


Add required dt node for cmu_top & cmu_peric block.
This also add sysreg_peric node. sysreg_peric contains
DRCG and MEMCLK SFRs bits which are used in clock driver.

Signed-off-by: Alim Akhtar <alim.akhtar@xxxxxxxxxxx>
Signed-off-by: Raghav Sharma <raghav.s@xxxxxxxxxxx>
---
arch/arm64/boot/dts/exynos/exynos8855.dtsi | 32 ++++++++++++++++++++++
1 file changed, 32 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynos8855.dtsi b/arch/arm64/boot/dts/exynos/exynos8855.dtsi
index 0333b80eba84..2e5dc79d66bc 100644
--- a/arch/arm64/boot/dts/exynos/exynos8855.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos8855.dtsi
@@ -10,6 +10,7 @@
*/

#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/samsung,exynos8855.h>

/ {
compatible = "samsung,exynos8855";
@@ -170,12 +171,43 @@ pinctrl_cmgp: pinctrl@12030000 {
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
};

+ cmu_top: clock-controller@13900000 {
+ compatible = "samsung,exynos8855-cmu-top";
+ reg = <0x13900000 0x10000>;
+ #clock-cells = <1>;
+ clocks = <&oscclk>;
+ clock-names = "oscclk";
+ };
+
pinctrl_usi: pinctrl@15030000 {
compatible = "samsung,exynos8855-pinctrl";
reg = <0x15030000 0x1000>;
interrupts = <GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH>;
};

+ cmu_peric: clock-controller@15400000 {
+ compatible = "samsung,exynos8855-cmu-peric";
+ reg = <0x15400000 0x10000>;
+ #clock-cells = <1>;
+
+ clocks = <&oscclk>,
+ <&cmu_top CLKCMU_DOUT_PERIC_NOC>,
+ <&cmu_top CLKCMU_DOUT_PERIC_MMC_CARD>,
+ <&cmu_top CLKCMU_DOUT_PERIC_IP>;
+ clock-names = "oscclk",
+ "bus",
+ "mmc_card",
+ "ip";
+ samsung,sysreg = <&sysreg_peric>;
+ };
+
+ sysreg_peric: syscon@15420000 {
+ compatible = "samsung,exynos8855-peric-sysreg",
+ "syscon";
+ reg = <0x15420000 0x10000>;
+ clocks = <&cmu_peric CLK_GOUT_SYSREG_PERIC>;
+ };
+
pinctrl_peric: pinctrl@15440000 {
compatible = "samsung,exynos8855-pinctrl";
reg = <0x15440000 0x1000>;
--
2.34.1