[tip: x86/cleanups] x86/asm: Remove CR4 read fault handler

[tip-bot2 for Brian Gerst]

The following commit has been merged into the x86/cleanups branch of tip:

Commit-ID:     27441d76b3d6604de9162c4c24d034bcfe3249de
Gitweb:        https://git.kernel.org/tip/27441d76b3d6604de9162c4c24d034bcfe3249de
Author:        Brian Gerst <brgerst@xxxxxxxxx>
AuthorDate:    Sat, 05 Sep 2026 18:55:19 -04:00
Committer:     Borislav Petkov (AMD) <bp@xxxxxxxxx>
CommitterDate: Thu, 01 Oct 2026 18:04:49 -07:00

x86/asm: Remove CR4 read fault handler

Remove the fault handler from native_read_cr4() since 486 support has
been removed.

Signed-off-by: Brian Gerst <brgerst@xxxxxxxxx>
Signed-off-by: Borislav Petkov (AMD) <bp@xxxxxxxxx>
Link: https://patch.msgid.link/20260905225519.1002976-1-brgerst@xxxxxxxxx
---
 arch/x86/include/asm/special_insns.h | 13 -------------
 1 file changed, 13 deletions(-)

diff --git a/arch/x86/include/asm/special_insns.h b/arch/x86/include/asm/special_insns.h
index 46aa2c9..6c80f69 100644
--- a/arch/x86/include/asm/special_insns.h
+++ b/arch/x86/include/asm/special_insns.h
@@ -46,20 +46,7 @@ static __always_inline void native_write_cr3(unsigned long val)
 static inline unsigned long native_read_cr4(void)
 {
 	unsigned long val;
-#ifdef CONFIG_X86_32
-	/*
-	 * This could fault if CR4 does not exist.  Non-existent CR4
-	 * is functionally equivalent to CR4 == 0.  Keep it simple and pretend
-	 * that CR4 == 0 on CPUs that don't have CR4.
-	 */
-	asm volatile("1: mov %%cr4, %0\n"
-		     "2:\n"
-		     _ASM_EXTABLE(1b, 2b)
-		     : "=r" (val) : "0" (0));
-#else
-	/* CR4 always exists on x86_64. */
 	asm volatile("mov %%cr4,%0" : "=r" (val));
-#endif
 	return val;
 }