[PATCH 0/7] refactor Andes cache driver for generic platform support

[Hui Min Mina Chou]

This series refactors the Andes cache driver from an AX45MP-specific
implementation to a generic Last Level Cache (LLC) driver that supports
a broader range of Andes CPU cores.

The main motivation is to decouple the driver from AX45MP-specific
naming and assumptions, making it easier to support future Andes
platforms without duplicating code.

Changes in this series:

- Refactor the ax45mp_cache driver into a generic andes_llcache driver,
  introducing support for multiple Andes CPU cores and updating the
  compatible strings accordingly

- Improve initialization by centralizing cache operations

- Improve LLC operation performance by switching to relaxed I/O
  accessors and eliminating unnecessary fence instructions on I/O
  memory, leveraging the platform's point-to-point strongly ordered
  channel guarantee. Also fix hart ID mapping to use
  cpuid_to_hartid_map() for correct behavior in AMP setups

- Centralize cache operations and adopt native WBINVAL support,
  simplifying the cache flush/invalidate path

- Rename DT binding schema from andestech,ax45mp-cache to
  andestech,llcache and update all compatible strings in the RISC-V DTS
  files accordingly

- Add MAINTAINERS entry for the Andes cache driver


Hui Min Mina Chou (7):
  cache: ax45mp_cache: refactor cache driver for generic Andes platform
    support
  cache: andes_llcache: refactor initialization and cache operations
  cache: andes_llcache: improve performance of LLC operation
  cache: andes_llcache: centralize cache ops and use native WBINVAL
  dt-bindings: cache: ax45mp-cache: rename ax45mp-cache to llcache
  dts: riscv: update cache compatible strings to LLC
  MAINTAINERS: Add maintainers for Andes cache driver

 ...ache.yaml => andestech,andes-llcache.yaml} |  20 +-
 MAINTAINERS                                   |   8 +
 arch/riscv/Kconfig.errata                     |   2 +-
 arch/riscv/boot/dts/andes/qilai.dtsi          |   4 +-
 arch/riscv/boot/dts/renesas/r9a07g043f.dtsi   |   2 +-
 drivers/cache/Kconfig                         |   6 +-
 drivers/cache/Makefile                        |   2 +-
 drivers/cache/andes_llcache.c                 | 215 +++++++++++++++++
 drivers/cache/ax45mp_cache.c                  | 217 ------------------
 drivers/soc/renesas/Kconfig                   |   2 +-
 include/linux/soc/andes/csr.h                 |  12 +
 11 files changed, 254 insertions(+), 236 deletions(-)
 rename Documentation/devicetree/bindings/cache/{andestech,ax45mp-cache.yaml => andestech,andes-llcache.yaml} (76%)
 create mode 100644 drivers/cache/andes_llcache.c
 delete mode 100644 drivers/cache/ax45mp_cache.c
 create mode 100644 include/linux/soc/andes/csr.h

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2.34.1