[PATCH v2 3/3] ASoC: Intel: cht_bsw_rt5672: Fix MCLK leak in platform_clock_control
From: aravindanilraj0702
Date: Fri Mar 27 2026 - 16:20:04 EST
From: Aravind Anilraj <aravindanilraj0702@xxxxxxxxx>
If snd_soc_dai_set_pll() or snd_soc_dai_set_sysclk() fail inside the
EVENT_ON path, the function returns without calling
clk_disable_unprepare() on ctx->mclk, which was already enabled earlier
in the same code path. Add the missing clk_disable_unprepare() calls
before returning the error.
Signed-off-by: Aravind Anilraj <aravindanilraj0702@xxxxxxxxx>
---
sound/soc/intel/boards/cht_bsw_rt5672.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/sound/soc/intel/boards/cht_bsw_rt5672.c b/sound/soc/intel/boards/cht_bsw_rt5672.c
index 359723f2700e..e5806dc16ff9 100644
--- a/sound/soc/intel/boards/cht_bsw_rt5672.c
+++ b/sound/soc/intel/boards/cht_bsw_rt5672.c
@@ -67,7 +67,7 @@ static int platform_clock_control(struct snd_soc_dapm_widget *w,
ret = clk_prepare_enable(ctx->mclk);
if (ret < 0) {
dev_err(card->dev,
- "could not configure MCLK state");
+ "could not configure MCLK state\n");
return ret;
}
}
@@ -77,6 +77,7 @@ static int platform_clock_control(struct snd_soc_dapm_widget *w,
CHT_PLAT_CLK_3_HZ, 48000 * 512);
if (ret < 0) {
dev_err(card->dev, "can't set codec pll: %d\n", ret);
+ clk_disable_unprepare(ctx->mclk);
return ret;
}
@@ -85,6 +86,7 @@ static int platform_clock_control(struct snd_soc_dapm_widget *w,
48000 * 512, SND_SOC_CLOCK_IN);
if (ret < 0) {
dev_err(card->dev, "can't set codec sysclk: %d\n", ret);
+ clk_disable_unprepare(ctx->mclk);
return ret;
}
} else {
--
2.47.3