[PATCH 2/2] pinctrl: qcom: Drop redundant intr_target_reg on modern SoCs

From: Mukesh Ojha

Date: Fri Mar 27 2026 - 13:27:31 EST

On all Qualcomm TLMM generations from APQ8084 onwards, the interrupt
target routing bits are located in the same register as the interrupt
configuration bits (intr_cfg_reg). Only five older SoCs — APQ8064,
IPQ8064, MDM9615, MSM8660 and MSM8960 — have a genuinely separate
interrupt target routing register at a different offset (0x400 + 0x4 * id).

Replace MSM_ACCESSOR(intr_target) with a custom accessor that falls back
to intr_cfg_reg when intr_target_reg is zero. Apply the same fallback in
the SCM path. Drop the now-redundant .intr_target_reg initializer from
all SoC drivers where it duplicated intr_cfg_reg, keeping it only in
the five drivers where it genuinely differs.

Signed-off-by: Mukesh Ojha <mukesh.ojha@xxxxxxxxxxxxxxxx>
---
drivers/pinctrl/qcom/pinctrl-apq8084.c | 2 --
drivers/pinctrl/qcom/pinctrl-eliza.c | 3 ---
drivers/pinctrl/qcom/pinctrl-glymur.c | 3 ---
drivers/pinctrl/qcom/pinctrl-ipq4019.c | 1 -
drivers/pinctrl/qcom/pinctrl-ipq5018.c | 1 -
drivers/pinctrl/qcom/pinctrl-ipq5332.c | 1 -
drivers/pinctrl/qcom/pinctrl-ipq5424.c | 1 -
drivers/pinctrl/qcom/pinctrl-ipq6018.c | 1 -
drivers/pinctrl/qcom/pinctrl-ipq8074.c | 1 -
drivers/pinctrl/qcom/pinctrl-ipq9574.c | 1 -
drivers/pinctrl/qcom/pinctrl-kaanapali.c | 3 ---
drivers/pinctrl/qcom/pinctrl-mdm9607.c | 2 --
drivers/pinctrl/qcom/pinctrl-milos.c | 3 ---
drivers/pinctrl/qcom/pinctrl-msm.c | 20 ++++++++++++++++++--
drivers/pinctrl/qcom/pinctrl-msm.h | 6 +++++-
drivers/pinctrl/qcom/pinctrl-msm8226.c | 2 --
drivers/pinctrl/qcom/pinctrl-msm8909.c | 2 --
drivers/pinctrl/qcom/pinctrl-msm8916.c | 2 --
drivers/pinctrl/qcom/pinctrl-msm8917.c | 2 --
drivers/pinctrl/qcom/pinctrl-msm8953.c | 2 --
drivers/pinctrl/qcom/pinctrl-msm8976.c | 2 --
drivers/pinctrl/qcom/pinctrl-msm8994.c | 2 --
drivers/pinctrl/qcom/pinctrl-msm8996.c | 2 --
drivers/pinctrl/qcom/pinctrl-msm8998.c | 3 ---
drivers/pinctrl/qcom/pinctrl-msm8x74.c | 3 ---
drivers/pinctrl/qcom/pinctrl-qcm2290.c | 3 ---
drivers/pinctrl/qcom/pinctrl-qcs404.c | 2 --
drivers/pinctrl/qcom/pinctrl-qcs615.c | 3 ---
drivers/pinctrl/qcom/pinctrl-qcs8300.c | 3 ---
drivers/pinctrl/qcom/pinctrl-qdf2xxx.c | 1 -
drivers/pinctrl/qcom/pinctrl-qdu1000.c | 3 ---
drivers/pinctrl/qcom/pinctrl-sa8775p.c | 3 ---
drivers/pinctrl/qcom/pinctrl-sar2130p.c | 2 --
drivers/pinctrl/qcom/pinctrl-sc7180.c | 3 ---
drivers/pinctrl/qcom/pinctrl-sc7280.c | 3 ---
drivers/pinctrl/qcom/pinctrl-sc8180x.c | 3 ---
drivers/pinctrl/qcom/pinctrl-sc8280xp.c | 3 ---
drivers/pinctrl/qcom/pinctrl-sdm660.c | 2 --
drivers/pinctrl/qcom/pinctrl-sdm670.c | 4 ----
drivers/pinctrl/qcom/pinctrl-sdm845.c | 3 ---
drivers/pinctrl/qcom/pinctrl-sdx55.c | 2 --
drivers/pinctrl/qcom/pinctrl-sdx65.c | 3 ---
drivers/pinctrl/qcom/pinctrl-sdx75.c | 2 --
drivers/pinctrl/qcom/pinctrl-sm4450.c | 3 ---
drivers/pinctrl/qcom/pinctrl-sm6115.c | 3 ---
drivers/pinctrl/qcom/pinctrl-sm6125.c | 3 ---
drivers/pinctrl/qcom/pinctrl-sm6350.c | 3 ---
drivers/pinctrl/qcom/pinctrl-sm6375.c | 3 ---
drivers/pinctrl/qcom/pinctrl-sm7150.c | 3 ---
drivers/pinctrl/qcom/pinctrl-sm8150.c | 3 ---
drivers/pinctrl/qcom/pinctrl-sm8250.c | 3 ---
drivers/pinctrl/qcom/pinctrl-sm8350.c | 3 ---
drivers/pinctrl/qcom/pinctrl-sm8450.c | 3 ---
drivers/pinctrl/qcom/pinctrl-sm8550.c | 3 ---
drivers/pinctrl/qcom/pinctrl-sm8650.c | 3 ---
drivers/pinctrl/qcom/pinctrl-sm8750.c | 3 ---
drivers/pinctrl/qcom/pinctrl-x1e80100.c | 3 ---
57 files changed, 23 insertions(+), 138 deletions(-)

diff --git a/drivers/pinctrl/qcom/pinctrl-apq8084.c b/drivers/pinctrl/qcom/pinctrl-apq8084.c
index 27693cd64881..9fdbe6743512 100644
--- a/drivers/pinctrl/qcom/pinctrl-apq8084.c
+++ b/drivers/pinctrl/qcom/pinctrl-apq8084.c
@@ -343,7 +343,6 @@ static const unsigned int sdc2_data_pins[] = { 152 };
.io_reg = 0x1004 + 0x10 * id, \
.intr_cfg_reg = 0x1008 + 0x10 * id, \
.intr_status_reg = 0x100c + 0x10 * id, \
- .intr_target_reg = 0x1008 + 0x10 * id, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
@@ -370,7 +369,6 @@ static const unsigned int sdc2_data_pins[] = { 152 };
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = pull, \
.drv_bit = drv, \
diff --git a/drivers/pinctrl/qcom/pinctrl-eliza.c b/drivers/pinctrl/qcom/pinctrl-eliza.c
index 19c706137f81..c1f756cbcdeb 100644
--- a/drivers/pinctrl/qcom/pinctrl-eliza.c
+++ b/drivers/pinctrl/qcom/pinctrl-eliza.c
@@ -34,7 +34,6 @@
.io_reg = 0x4 + REG_SIZE * id, \
.intr_cfg_reg = 0x8 + REG_SIZE * id, \
.intr_status_reg = 0xc + REG_SIZE * id, \
- .intr_target_reg = 0x8 + REG_SIZE * id, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
@@ -64,7 +63,6 @@
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = pull, \
.drv_bit = drv, \
@@ -89,7 +87,6 @@
.io_reg = io, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = 3, \
.drv_bit = 0, \
diff --git a/drivers/pinctrl/qcom/pinctrl-glymur.c b/drivers/pinctrl/qcom/pinctrl-glymur.c
index 2da3b513d31b..9838c7839923 100644
--- a/drivers/pinctrl/qcom/pinctrl-glymur.c
+++ b/drivers/pinctrl/qcom/pinctrl-glymur.c
@@ -21,7 +21,6 @@
.io_reg = 0x4 + REG_SIZE * id, \
.intr_cfg_reg = 0x8 + REG_SIZE * id, \
.intr_status_reg = 0xc + REG_SIZE * id, \
- .intr_target_reg = 0x8 + REG_SIZE * id, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
@@ -64,7 +63,6 @@
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = pull, \
.drv_bit = drv, \
@@ -89,7 +87,6 @@
.io_reg = io, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = 3, \
.drv_bit = 0, \
diff --git a/drivers/pinctrl/qcom/pinctrl-ipq4019.c b/drivers/pinctrl/qcom/pinctrl-ipq4019.c
index 6ede3149b6e1..c5f0decc3eb3 100644
--- a/drivers/pinctrl/qcom/pinctrl-ipq4019.c
+++ b/drivers/pinctrl/qcom/pinctrl-ipq4019.c
@@ -242,7 +242,6 @@ DECLARE_QCA_GPIO_PINS(99);
.io_reg = 0x4 + 0x1000 * id, \
.intr_cfg_reg = 0x8 + 0x1000 * id, \
.intr_status_reg = 0xc + 0x1000 * id, \
- .intr_target_reg = 0x8 + 0x1000 * id, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
diff --git a/drivers/pinctrl/qcom/pinctrl-ipq5018.c b/drivers/pinctrl/qcom/pinctrl-ipq5018.c
index cbf34854f882..0698c8f0110b 100644
--- a/drivers/pinctrl/qcom/pinctrl-ipq5018.c
+++ b/drivers/pinctrl/qcom/pinctrl-ipq5018.c
@@ -32,7 +32,6 @@
.io_reg = 0x4 + REG_SIZE * id, \
.intr_cfg_reg = 0x8 + REG_SIZE * id, \
.intr_status_reg = 0xc + REG_SIZE * id, \
- .intr_target_reg = 0x8 + REG_SIZE * id, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
diff --git a/drivers/pinctrl/qcom/pinctrl-ipq5332.c b/drivers/pinctrl/qcom/pinctrl-ipq5332.c
index 239cbe75f198..26a7a8c818f3 100644
--- a/drivers/pinctrl/qcom/pinctrl-ipq5332.c
+++ b/drivers/pinctrl/qcom/pinctrl-ipq5332.c
@@ -32,7 +32,6 @@
.io_reg = 0x4 + REG_SIZE * id, \
.intr_cfg_reg = 0x8 + REG_SIZE * id, \
.intr_status_reg = 0xc + REG_SIZE * id, \
- .intr_target_reg = 0x8 + REG_SIZE * id, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
diff --git a/drivers/pinctrl/qcom/pinctrl-ipq5424.c b/drivers/pinctrl/qcom/pinctrl-ipq5424.c
index 67b452a033d6..362ad88a5386 100644
--- a/drivers/pinctrl/qcom/pinctrl-ipq5424.c
+++ b/drivers/pinctrl/qcom/pinctrl-ipq5424.c
@@ -33,7 +33,6 @@
.io_reg = 0x4 + REG_SIZE * id, \
.intr_cfg_reg = 0x8 + REG_SIZE * id, \
.intr_status_reg = 0xc + REG_SIZE * id, \
- .intr_target_reg = 0x8 + REG_SIZE * id, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
diff --git a/drivers/pinctrl/qcom/pinctrl-ipq6018.c b/drivers/pinctrl/qcom/pinctrl-ipq6018.c
index be177fb0a92d..cc83f9362a85 100644
--- a/drivers/pinctrl/qcom/pinctrl-ipq6018.c
+++ b/drivers/pinctrl/qcom/pinctrl-ipq6018.c
@@ -32,7 +32,6 @@
.io_reg = 0x4 + REG_SIZE * id, \
.intr_cfg_reg = 0x8 + REG_SIZE * id, \
.intr_status_reg = 0xc + REG_SIZE * id, \
- .intr_target_reg = 0x8 + REG_SIZE * id, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
diff --git a/drivers/pinctrl/qcom/pinctrl-ipq8074.c b/drivers/pinctrl/qcom/pinctrl-ipq8074.c
index e94de9083314..64ce8ea8f544 100644
--- a/drivers/pinctrl/qcom/pinctrl-ipq8074.c
+++ b/drivers/pinctrl/qcom/pinctrl-ipq8074.c
@@ -32,7 +32,6 @@
.io_reg = 0x4 + REG_SIZE * id, \
.intr_cfg_reg = 0x8 + REG_SIZE * id, \
.intr_status_reg = 0xc + REG_SIZE * id, \
- .intr_target_reg = 0x8 + REG_SIZE * id, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
diff --git a/drivers/pinctrl/qcom/pinctrl-ipq9574.c b/drivers/pinctrl/qcom/pinctrl-ipq9574.c
index 3ed093ea8eb9..09223eb166c9 100644
--- a/drivers/pinctrl/qcom/pinctrl-ipq9574.c
+++ b/drivers/pinctrl/qcom/pinctrl-ipq9574.c
@@ -32,7 +32,6 @@
.io_reg = 0x4 + REG_SIZE * id, \
.intr_cfg_reg = 0x8 + REG_SIZE * id, \
.intr_status_reg = 0xc + REG_SIZE * id, \
- .intr_target_reg = 0x8 + REG_SIZE * id, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
diff --git a/drivers/pinctrl/qcom/pinctrl-kaanapali.c b/drivers/pinctrl/qcom/pinctrl-kaanapali.c
index 364e6d997337..5cc45b9c55ab 100644
--- a/drivers/pinctrl/qcom/pinctrl-kaanapali.c
+++ b/drivers/pinctrl/qcom/pinctrl-kaanapali.c
@@ -34,7 +34,6 @@
.io_reg = 0x4 + REG_SIZE * id, \
.intr_cfg_reg = 0x8 + REG_SIZE * id, \
.intr_status_reg = 0xc + REG_SIZE * id, \
- .intr_target_reg = 0x8 + REG_SIZE * id, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
@@ -64,7 +63,6 @@
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = pull, \
.drv_bit = drv, \
@@ -89,7 +87,6 @@
.io_reg = io, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = 3, \
.drv_bit = 0, \
diff --git a/drivers/pinctrl/qcom/pinctrl-mdm9607.c b/drivers/pinctrl/qcom/pinctrl-mdm9607.c
index cef330547ce7..5794b0a11010 100644
--- a/drivers/pinctrl/qcom/pinctrl-mdm9607.c
+++ b/drivers/pinctrl/qcom/pinctrl-mdm9607.c
@@ -225,7 +225,6 @@ static const unsigned int qdsd_data3_pins[] = { 91 };
.io_reg = 0x4 + 0x1000 * id, \
.intr_cfg_reg = 0x8 + 0x1000 * id, \
.intr_status_reg = 0xc + 0x1000 * id, \
- .intr_target_reg = 0x8 + 0x1000 * id, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
@@ -251,7 +250,6 @@ static const unsigned int qdsd_data3_pins[] = { 91 };
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = pull, \
.drv_bit = drv, \
diff --git a/drivers/pinctrl/qcom/pinctrl-milos.c b/drivers/pinctrl/qcom/pinctrl-milos.c
index 19abd5233a2c..74b5253257af 100644
--- a/drivers/pinctrl/qcom/pinctrl-milos.c
+++ b/drivers/pinctrl/qcom/pinctrl-milos.c
@@ -36,7 +36,6 @@
.io_reg = 0x4 + REG_SIZE * id, \
.intr_cfg_reg = 0x8 + REG_SIZE * id, \
.intr_status_reg = 0xc + REG_SIZE * id, \
- .intr_target_reg = 0x8 + REG_SIZE * id, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
@@ -67,7 +66,6 @@
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = pull, \
.drv_bit = drv, \
@@ -92,7 +90,6 @@
.io_reg = io, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = 3, \
.drv_bit = 0, \
diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c
index e99871b90ab9..45b3a2763eb8 100644
--- a/drivers/pinctrl/qcom/pinctrl-msm.c
+++ b/drivers/pinctrl/qcom/pinctrl-msm.c
@@ -98,7 +98,22 @@ MSM_ACCESSOR(ctl)
MSM_ACCESSOR(io)
MSM_ACCESSOR(intr_cfg)
MSM_ACCESSOR(intr_status)
-MSM_ACCESSOR(intr_target)
+
+static u32 msm_readl_intr_target(struct msm_pinctrl *pctrl,
+ const struct msm_pingroup *g)
+{
+ u32 reg = g->intr_target_reg ? g->intr_target_reg : g->intr_cfg_reg;
+
+ return readl(pctrl->regs[g->tile] + reg);
+}
+
+static void msm_writel_intr_target(u32 val, struct msm_pinctrl *pctrl,
+ const struct msm_pingroup *g)
+{
+ u32 reg = g->intr_target_reg ? g->intr_target_reg : g->intr_cfg_reg;
+
+ writel(val, pctrl->regs[g->tile] + reg);
+}

static void msm_ack_intr_status(struct msm_pinctrl *pctrl,
const struct msm_pingroup *g)
@@ -1078,7 +1093,8 @@ static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int type)
intr_target_mask = GENMASK(g->intr_target_width - 1, 0);

if (pctrl->intr_target_use_scm) {
- u32 addr = pctrl->phys_base[0] + g->intr_target_reg;
+ u32 reg = g->intr_target_reg ? g->intr_target_reg : g->intr_cfg_reg;
+ u32 addr = pctrl->phys_base[0] + reg;
int ret;

qcom_scm_io_readl(addr, &val);
diff --git a/drivers/pinctrl/qcom/pinctrl-msm.h b/drivers/pinctrl/qcom/pinctrl-msm.h
index 4625fa5320a9..a4af279f748a 100644
--- a/drivers/pinctrl/qcom/pinctrl-msm.h
+++ b/drivers/pinctrl/qcom/pinctrl-msm.h
@@ -52,7 +52,11 @@ struct pinctrl_pin_desc;
* @intr_cfg_reg: Offset of the register holding interrupt configuration bits.
* @intr_status_reg: Offset of the register holding the status bits for this group.
* @intr_target_reg: Offset of the register specifying routing of the interrupts
- * from this group.
+ * from this group. On most SoCs this register is the same as
+ * @intr_cfg_reg; leaving this field as zero causes the driver
+ * to fall back to @intr_cfg_reg automatically. Only set this
+ * explicitly on older SoCs where the interrupt target routing
+ * lives in a separate register (e.g. APQ8064, MSM8960).
* @mux_bit: Offset in @ctl_reg for the pinmux function selection.
* @pull_bit: Offset in @ctl_reg for the bias configuration.
* @drv_bit: Offset in @ctl_reg for the drive strength configuration.
diff --git a/drivers/pinctrl/qcom/pinctrl-msm8226.c b/drivers/pinctrl/qcom/pinctrl-msm8226.c
index a81aa092ef12..d27b7599ea83 100644
--- a/drivers/pinctrl/qcom/pinctrl-msm8226.c
+++ b/drivers/pinctrl/qcom/pinctrl-msm8226.c
@@ -282,7 +282,6 @@ static const unsigned int sdc2_data_pins[] = { 122 };
.io_reg = 0x1004 + 0x10 * id, \
.intr_cfg_reg = 0x1008 + 0x10 * id, \
.intr_status_reg = 0x100c + 0x10 * id, \
- .intr_target_reg = 0x1008 + 0x10 * id, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
@@ -308,7 +307,6 @@ static const unsigned int sdc2_data_pins[] = { 122 };
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = pull, \
.drv_bit = drv, \
diff --git a/drivers/pinctrl/qcom/pinctrl-msm8909.c b/drivers/pinctrl/qcom/pinctrl-msm8909.c
index 544a52fb8f3d..8fa922d89101 100644
--- a/drivers/pinctrl/qcom/pinctrl-msm8909.c
+++ b/drivers/pinctrl/qcom/pinctrl-msm8909.c
@@ -33,7 +33,6 @@
.io_reg = 0x4 + REG_SIZE * id, \
.intr_cfg_reg = 0x8 + REG_SIZE * id, \
.intr_status_reg = 0xc + REG_SIZE * id, \
- .intr_target_reg = 0x8 + REG_SIZE * id, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
@@ -59,7 +58,6 @@
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = pull, \
.drv_bit = drv, \
diff --git a/drivers/pinctrl/qcom/pinctrl-msm8916.c b/drivers/pinctrl/qcom/pinctrl-msm8916.c
index b1b6934bb4b6..709c5d1d4d0a 100644
--- a/drivers/pinctrl/qcom/pinctrl-msm8916.c
+++ b/drivers/pinctrl/qcom/pinctrl-msm8916.c
@@ -307,7 +307,6 @@ static const unsigned int qdsd_data3_pins[] = { 133 };
.io_reg = 0x4 + 0x1000 * id, \
.intr_cfg_reg = 0x8 + 0x1000 * id, \
.intr_status_reg = 0xc + 0x1000 * id, \
- .intr_target_reg = 0x8 + 0x1000 * id, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
@@ -333,7 +332,6 @@ static const unsigned int qdsd_data3_pins[] = { 133 };
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = pull, \
.drv_bit = drv, \
diff --git a/drivers/pinctrl/qcom/pinctrl-msm8917.c b/drivers/pinctrl/qcom/pinctrl-msm8917.c
index f23d92d6615b..d1ede4891703 100644
--- a/drivers/pinctrl/qcom/pinctrl-msm8917.c
+++ b/drivers/pinctrl/qcom/pinctrl-msm8917.c
@@ -333,7 +333,6 @@ static const unsigned int qdsd_data3_pins[] = { 146 };
.io_reg = 0x4 + 0x1000 * id, \
.intr_cfg_reg = 0x8 + 0x1000 * id, \
.intr_status_reg = 0xc + 0x1000 * id, \
- .intr_target_reg = 0x8 + 0x1000 * id, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
@@ -359,7 +358,6 @@ static const unsigned int qdsd_data3_pins[] = { 146 };
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = pull, \
.drv_bit = drv, \
diff --git a/drivers/pinctrl/qcom/pinctrl-msm8953.c b/drivers/pinctrl/qcom/pinctrl-msm8953.c
index 67db062fdf56..02ea89f5feaa 100644
--- a/drivers/pinctrl/qcom/pinctrl-msm8953.c
+++ b/drivers/pinctrl/qcom/pinctrl-msm8953.c
@@ -29,7 +29,6 @@
.io_reg = 0x4 + 0x1000 * id, \
.intr_cfg_reg = 0x8 + 0x1000 * id, \
.intr_status_reg = 0xc + 0x1000 * id, \
- .intr_target_reg = 0x8 + 0x1000 * id, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
@@ -55,7 +54,6 @@
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = pull, \
.drv_bit = drv, \
diff --git a/drivers/pinctrl/qcom/pinctrl-msm8976.c b/drivers/pinctrl/qcom/pinctrl-msm8976.c
index 345539b9e696..906a90778b97 100644
--- a/drivers/pinctrl/qcom/pinctrl-msm8976.c
+++ b/drivers/pinctrl/qcom/pinctrl-msm8976.c
@@ -35,7 +35,6 @@
.io_reg = REG_BASE + 0x4 + REG_SIZE * id, \
.intr_cfg_reg = REG_BASE + 0x8 + REG_SIZE * id, \
.intr_status_reg = REG_BASE + 0xc + REG_SIZE * id, \
- .intr_target_reg = REG_BASE + 0x8 + REG_SIZE * id, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
@@ -61,7 +60,6 @@
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = pull, \
.drv_bit = drv, \
diff --git a/drivers/pinctrl/qcom/pinctrl-msm8994.c b/drivers/pinctrl/qcom/pinctrl-msm8994.c
index 94e042d1f4b2..ecbe6b91d1da 100644
--- a/drivers/pinctrl/qcom/pinctrl-msm8994.c
+++ b/drivers/pinctrl/qcom/pinctrl-msm8994.c
@@ -33,7 +33,6 @@
.io_reg = 0x1004 + 0x10 * id, \
.intr_cfg_reg = 0x1008 + 0x10 * id, \
.intr_status_reg = 0x100c + 0x10 * id, \
- .intr_target_reg = 0x1008 + 0x10 * id, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
@@ -59,7 +58,6 @@
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = pull, \
.drv_bit = drv, \
diff --git a/drivers/pinctrl/qcom/pinctrl-msm8996.c b/drivers/pinctrl/qcom/pinctrl-msm8996.c
index e5b55693d023..73b07a10a957 100644
--- a/drivers/pinctrl/qcom/pinctrl-msm8996.c
+++ b/drivers/pinctrl/qcom/pinctrl-msm8996.c
@@ -33,7 +33,6 @@
.io_reg = REG_BASE + 0x4 + REG_SIZE * id, \
.intr_cfg_reg = REG_BASE + 0x8 + REG_SIZE * id, \
.intr_status_reg = REG_BASE + 0xc + REG_SIZE * id, \
- .intr_target_reg = REG_BASE + 0x8 + REG_SIZE * id, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
@@ -59,7 +58,6 @@
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = pull, \
.drv_bit = drv, \
diff --git a/drivers/pinctrl/qcom/pinctrl-msm8998.c b/drivers/pinctrl/qcom/pinctrl-msm8998.c
index b727593af34a..dcf11b79e562 100644
--- a/drivers/pinctrl/qcom/pinctrl-msm8998.c
+++ b/drivers/pinctrl/qcom/pinctrl-msm8998.c
@@ -35,7 +35,6 @@
.io_reg = base + 0x4 + 0x1000 * id, \
.intr_cfg_reg = base + 0x8 + 0x1000 * id, \
.intr_status_reg = base + 0xc + 0x1000 * id, \
- .intr_target_reg = base + 0x8 + 0x1000 * id, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
@@ -61,7 +60,6 @@
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = pull, \
.drv_bit = drv, \
@@ -86,7 +84,6 @@
.io_reg = offset + 0x4, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = 3, \
.drv_bit = 0, \
diff --git a/drivers/pinctrl/qcom/pinctrl-msm8x74.c b/drivers/pinctrl/qcom/pinctrl-msm8x74.c
index 202bec003e96..ff432ec5815a 100644
--- a/drivers/pinctrl/qcom/pinctrl-msm8x74.c
+++ b/drivers/pinctrl/qcom/pinctrl-msm8x74.c
@@ -344,7 +344,6 @@ static const unsigned int hsic_data_pins[] = { 153 };
.io_reg = 0x1004 + 0x10 * id, \
.intr_cfg_reg = 0x1008 + 0x10 * id, \
.intr_status_reg = 0x100c + 0x10 * id, \
- .intr_target_reg = 0x1008 + 0x10 * id, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
@@ -370,7 +369,6 @@ static const unsigned int hsic_data_pins[] = { 153 };
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = pull, \
.drv_bit = drv, \
@@ -401,7 +399,6 @@ static const unsigned int hsic_data_pins[] = { 153 };
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = 25, \
.pull_bit = -1, \
.drv_bit = -1, \
diff --git a/drivers/pinctrl/qcom/pinctrl-qcm2290.c b/drivers/pinctrl/qcom/pinctrl-qcm2290.c
index 38200957451e..3b28ac498885 100644
--- a/drivers/pinctrl/qcom/pinctrl-qcm2290.c
+++ b/drivers/pinctrl/qcom/pinctrl-qcm2290.c
@@ -33,7 +33,6 @@
.io_reg = 0x4 + REG_SIZE * id, \
.intr_cfg_reg = 0x8 + REG_SIZE * id, \
.intr_status_reg = 0xc + REG_SIZE * id, \
- .intr_target_reg = 0x8 + REG_SIZE * id, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
@@ -61,7 +60,6 @@
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = pull, \
.drv_bit = drv, \
@@ -86,7 +84,6 @@
.io_reg = offset + 0x4, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = 3, \
.drv_bit = 0, \
diff --git a/drivers/pinctrl/qcom/pinctrl-qcs404.c b/drivers/pinctrl/qcom/pinctrl-qcs404.c
index 0b8db2c7e58a..1048a7093b2e 100644
--- a/drivers/pinctrl/qcom/pinctrl-qcs404.c
+++ b/drivers/pinctrl/qcom/pinctrl-qcs404.c
@@ -43,7 +43,6 @@ enum {
.io_reg = 0x1000 * id + 0x4, \
.intr_cfg_reg = 0x1000 * id + 0x8, \
.intr_status_reg = 0x1000 * id + 0xc, \
- .intr_target_reg = 0x1000 * id + 0x8, \
.tile = _tile, \
.mux_bit = 2, \
.pull_bit = 0, \
@@ -70,7 +69,6 @@ enum {
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.tile = SOUTH, \
.mux_bit = -1, \
.pull_bit = pull, \
diff --git a/drivers/pinctrl/qcom/pinctrl-qcs615.c b/drivers/pinctrl/qcom/pinctrl-qcs615.c
index f1c827ddbfbf..0ed4332d989e 100644
--- a/drivers/pinctrl/qcom/pinctrl-qcs615.c
+++ b/drivers/pinctrl/qcom/pinctrl-qcs615.c
@@ -43,7 +43,6 @@ static const char * const qcs615_tiles[] = {
.io_reg = 0x1000 * id + 0x4, \
.intr_cfg_reg = 0x1000 * id + 0x8, \
.intr_status_reg = 0x1000 * id + 0xc, \
- .intr_target_reg = 0x1000 * id + 0x8, \
.tile = _tile, \
.mux_bit = 2, \
.pull_bit = 0, \
@@ -70,7 +69,6 @@ static const char * const qcs615_tiles[] = {
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.tile = _tile, \
.mux_bit = -1, \
.pull_bit = pull, \
@@ -96,7 +94,6 @@ static const char * const qcs615_tiles[] = {
.io_reg = offset + 0x4, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.tile = WEST, \
.mux_bit = -1, \
.pull_bit = 3, \
diff --git a/drivers/pinctrl/qcom/pinctrl-qcs8300.c b/drivers/pinctrl/qcom/pinctrl-qcs8300.c
index f1af1a620684..852cd36df6d5 100644
--- a/drivers/pinctrl/qcom/pinctrl-qcs8300.c
+++ b/drivers/pinctrl/qcom/pinctrl-qcs8300.c
@@ -34,7 +34,6 @@
.io_reg = 0x4 + REG_SIZE * id, \
.intr_cfg_reg = 0x8 + REG_SIZE * id, \
.intr_status_reg = 0xc + REG_SIZE * id, \
- .intr_target_reg = 0x8 + REG_SIZE * id, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
@@ -62,7 +61,6 @@
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = pull, \
.drv_bit = drv, \
@@ -87,7 +85,6 @@
.io_reg = offset + 0x4, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = 3, \
.drv_bit = 0, \
diff --git a/drivers/pinctrl/qcom/pinctrl-qdf2xxx.c b/drivers/pinctrl/qcom/pinctrl-qdf2xxx.c
index 9ecc4d40e4dc..3b9edcf8780b 100644
--- a/drivers/pinctrl/qcom/pinctrl-qdf2xxx.c
+++ b/drivers/pinctrl/qcom/pinctrl-qdf2xxx.c
@@ -106,7 +106,6 @@ static int qdf2xxx_pinctrl_probe(struct platform_device *pdev)
groups[gpio].io_reg = 0x04 + 0x10000 * gpio;
groups[gpio].intr_cfg_reg = 0x08 + 0x10000 * gpio;
groups[gpio].intr_status_reg = 0x0c + 0x10000 * gpio;
- groups[gpio].intr_target_reg = 0x08 + 0x10000 * gpio;

groups[gpio].mux_bit = 2;
groups[gpio].pull_bit = 0;
diff --git a/drivers/pinctrl/qcom/pinctrl-qdu1000.c b/drivers/pinctrl/qcom/pinctrl-qdu1000.c
index 7c535698a780..5125df7eb127 100644
--- a/drivers/pinctrl/qcom/pinctrl-qdu1000.c
+++ b/drivers/pinctrl/qcom/pinctrl-qdu1000.c
@@ -35,7 +35,6 @@
.io_reg = REG_BASE + 0x4 + REG_SIZE * id, \
.intr_cfg_reg = REG_BASE + 0x8 + REG_SIZE * id, \
.intr_status_reg = REG_BASE + 0xc + REG_SIZE * id, \
- .intr_target_reg = REG_BASE + 0x8 + REG_SIZE * id, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
@@ -61,7 +60,6 @@
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = pull, \
.drv_bit = drv, \
@@ -86,7 +84,6 @@
.io_reg = offset + 0x4, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = 3, \
.drv_bit = 0, \
diff --git a/drivers/pinctrl/qcom/pinctrl-sa8775p.c b/drivers/pinctrl/qcom/pinctrl-sa8775p.c
index 53f28b9c49ba..e9a510d3583f 100644
--- a/drivers/pinctrl/qcom/pinctrl-sa8775p.c
+++ b/drivers/pinctrl/qcom/pinctrl-sa8775p.c
@@ -34,7 +34,6 @@
.io_reg = REG_BASE + 0x4 + REG_SIZE * id, \
.intr_cfg_reg = REG_BASE + 0x8 + REG_SIZE * id, \
.intr_status_reg = REG_BASE + 0xc + REG_SIZE * id, \
- .intr_target_reg = REG_BASE + 0x8 + REG_SIZE * id, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
@@ -63,7 +62,6 @@
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = pull, \
.drv_bit = drv, \
@@ -88,7 +86,6 @@
.io_reg = offset + 0x4, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = 3, \
.drv_bit = 0, \
diff --git a/drivers/pinctrl/qcom/pinctrl-sar2130p.c b/drivers/pinctrl/qcom/pinctrl-sar2130p.c
index 4a53f4ee2041..1d1b5de4eefd 100644
--- a/drivers/pinctrl/qcom/pinctrl-sar2130p.c
+++ b/drivers/pinctrl/qcom/pinctrl-sar2130p.c
@@ -34,7 +34,6 @@
.io_reg = 0x4 + REG_SIZE * id, \
.intr_cfg_reg = 0x8 + REG_SIZE * id, \
.intr_status_reg = 0xc + REG_SIZE * id, \
- .intr_target_reg = 0x8 + REG_SIZE * id, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
@@ -62,7 +61,6 @@
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = pull, \
.drv_bit = drv, \
diff --git a/drivers/pinctrl/qcom/pinctrl-sc7180.c b/drivers/pinctrl/qcom/pinctrl-sc7180.c
index 3eae51472b13..01cfcb416f33 100644
--- a/drivers/pinctrl/qcom/pinctrl-sc7180.c
+++ b/drivers/pinctrl/qcom/pinctrl-sc7180.c
@@ -41,7 +41,6 @@ enum {
.io_reg = 0x1000 * id + 0x4, \
.intr_cfg_reg = 0x1000 * id + 0x8, \
.intr_status_reg = 0x1000 * id + 0xc, \
- .intr_target_reg = 0x1000 * id + 0x8, \
.tile = _tile, \
.mux_bit = 2, \
.pull_bit = 0, \
@@ -68,7 +67,6 @@ enum {
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.tile = SOUTH, \
.mux_bit = -1, \
.pull_bit = pull, \
@@ -94,7 +92,6 @@ enum {
.io_reg = offset + 0x4, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.tile = SOUTH, \
.mux_bit = -1, \
.pull_bit = 3, \
diff --git a/drivers/pinctrl/qcom/pinctrl-sc7280.c b/drivers/pinctrl/qcom/pinctrl-sc7280.c
index 44e09608aad0..f22fd56efd89 100644
--- a/drivers/pinctrl/qcom/pinctrl-sc7280.c
+++ b/drivers/pinctrl/qcom/pinctrl-sc7280.c
@@ -31,7 +31,6 @@
.io_reg = 0x1000 * id + 0x4, \
.intr_cfg_reg = 0x1000 * id + 0x8, \
.intr_status_reg = 0x1000 * id + 0xc, \
- .intr_target_reg = 0x1000 * id + 0x8, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
@@ -59,7 +58,6 @@
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = pull, \
.drv_bit = drv, \
@@ -84,7 +82,6 @@
.io_reg = offset + 0x4, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = 3, \
.drv_bit = 0, \
diff --git a/drivers/pinctrl/qcom/pinctrl-sc8180x.c b/drivers/pinctrl/qcom/pinctrl-sc8180x.c
index d9f9e3dd9dd1..062cb913e5ee 100644
--- a/drivers/pinctrl/qcom/pinctrl-sc8180x.c
+++ b/drivers/pinctrl/qcom/pinctrl-sc8180x.c
@@ -60,7 +60,6 @@ static const struct tile_info sc8180x_tile_info[] = {
.io_reg = REG_SIZE * id + 0x4 + offset, \
.intr_cfg_reg = REG_SIZE * id + 0x8 + offset, \
.intr_status_reg = REG_SIZE * id + 0xc + offset,\
- .intr_target_reg = REG_SIZE * id + 0x8 + offset,\
.tile = _tile, \
.mux_bit = 2, \
.pull_bit = 0, \
@@ -90,7 +89,6 @@ static const struct tile_info sc8180x_tile_info[] = {
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.tile = EAST, \
.mux_bit = -1, \
.pull_bit = pull, \
@@ -116,7 +114,6 @@ static const struct tile_info sc8180x_tile_info[] = {
.io_reg = 0xb6004, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.tile = SOUTH, \
.mux_bit = -1, \
.pull_bit = 3, \
diff --git a/drivers/pinctrl/qcom/pinctrl-sc8280xp.c b/drivers/pinctrl/qcom/pinctrl-sc8280xp.c
index cf8297e8b8f8..4056b9fa32f8 100644
--- a/drivers/pinctrl/qcom/pinctrl-sc8280xp.c
+++ b/drivers/pinctrl/qcom/pinctrl-sc8280xp.c
@@ -31,7 +31,6 @@
.io_reg = 0x4 + REG_SIZE * id, \
.intr_cfg_reg = 0x8 + REG_SIZE * id, \
.intr_status_reg = 0xc + REG_SIZE * id, \
- .intr_target_reg = 0x8 + REG_SIZE * id, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
@@ -59,7 +58,6 @@
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = pull, \
.drv_bit = drv, \
@@ -84,7 +82,6 @@
.io_reg = offset + 0x4, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = 3, \
.drv_bit = 0, \
diff --git a/drivers/pinctrl/qcom/pinctrl-sdm660.c b/drivers/pinctrl/qcom/pinctrl-sdm660.c
index 687d986de75c..ab0368653d30 100644
--- a/drivers/pinctrl/qcom/pinctrl-sdm660.c
+++ b/drivers/pinctrl/qcom/pinctrl-sdm660.c
@@ -46,7 +46,6 @@ enum {
.io_reg = 0x4 + REG_SIZE * id, \
.intr_cfg_reg = 0x8 + REG_SIZE * id, \
.intr_status_reg = 0xc + REG_SIZE * id, \
- .intr_target_reg = 0x8 + REG_SIZE * id, \
.tile = _tile, \
.mux_bit = 2, \
.pull_bit = 0, \
@@ -73,7 +72,6 @@ enum {
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.tile = NORTH, \
.mux_bit = -1, \
.pull_bit = pull, \
diff --git a/drivers/pinctrl/qcom/pinctrl-sdm670.c b/drivers/pinctrl/qcom/pinctrl-sdm670.c
index 486b72edf7b4..533b87c39cd5 100644
--- a/drivers/pinctrl/qcom/pinctrl-sdm670.c
+++ b/drivers/pinctrl/qcom/pinctrl-sdm670.c
@@ -37,7 +37,6 @@
.io_reg = base + 0x4 + REG_SIZE * id, \
.intr_cfg_reg = base + 0x8 + REG_SIZE * id, \
.intr_status_reg = base + 0xc + REG_SIZE * id, \
- .intr_target_reg = base + 0x8 + REG_SIZE * id, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
@@ -67,7 +66,6 @@
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = -1, \
.drv_bit = -1, \
@@ -92,7 +90,6 @@
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = pull, \
.drv_bit = drv, \
@@ -117,7 +114,6 @@
.io_reg = offset + 0x4, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = 3, \
.drv_bit = 0, \
diff --git a/drivers/pinctrl/qcom/pinctrl-sdm845.c b/drivers/pinctrl/qcom/pinctrl-sdm845.c
index 4cf8575797a0..b5ed2311b70e 100644
--- a/drivers/pinctrl/qcom/pinctrl-sdm845.c
+++ b/drivers/pinctrl/qcom/pinctrl-sdm845.c
@@ -37,7 +37,6 @@
.io_reg = base + 0x4 + REG_SIZE * id, \
.intr_cfg_reg = base + 0x8 + REG_SIZE * id, \
.intr_status_reg = base + 0xc + REG_SIZE * id, \
- .intr_target_reg = base + 0x8 + REG_SIZE * id, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
@@ -63,7 +62,6 @@
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = pull, \
.drv_bit = drv, \
@@ -88,7 +86,6 @@
.io_reg = offset + 0x4, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = 3, \
.drv_bit = 0, \
diff --git a/drivers/pinctrl/qcom/pinctrl-sdx55.c b/drivers/pinctrl/qcom/pinctrl-sdx55.c
index 79a7010b73f1..3e87f5927924 100644
--- a/drivers/pinctrl/qcom/pinctrl-sdx55.c
+++ b/drivers/pinctrl/qcom/pinctrl-sdx55.c
@@ -33,7 +33,6 @@
.io_reg = 0x4 + REG_SIZE * id, \
.intr_cfg_reg = 0x8 + REG_SIZE * id, \
.intr_status_reg = 0xc + REG_SIZE * id, \
- .intr_target_reg = 0x8 + REG_SIZE * id, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
@@ -59,7 +58,6 @@
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = pull, \
.drv_bit = drv, \
diff --git a/drivers/pinctrl/qcom/pinctrl-sdx65.c b/drivers/pinctrl/qcom/pinctrl-sdx65.c
index cc8a99a6a91e..4e787341b2a2 100644
--- a/drivers/pinctrl/qcom/pinctrl-sdx65.c
+++ b/drivers/pinctrl/qcom/pinctrl-sdx65.c
@@ -33,7 +33,6 @@
.io_reg = REG_BASE + 0x4 + REG_SIZE * id, \
.intr_cfg_reg = REG_BASE + 0x8 + REG_SIZE * id, \
.intr_status_reg = REG_BASE + 0xc + REG_SIZE * id, \
- .intr_target_reg = REG_BASE + 0x8 + REG_SIZE * id, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
@@ -59,7 +58,6 @@
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = pull, \
.drv_bit = drv, \
@@ -84,7 +82,6 @@
.io_reg = offset + 0x4, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = 3, \
.drv_bit = 0, \
diff --git a/drivers/pinctrl/qcom/pinctrl-sdx75.c b/drivers/pinctrl/qcom/pinctrl-sdx75.c
index 4078d83d818c..9a7e359dbd23 100644
--- a/drivers/pinctrl/qcom/pinctrl-sdx75.c
+++ b/drivers/pinctrl/qcom/pinctrl-sdx75.c
@@ -19,7 +19,6 @@
.io_reg = REG_BASE + 0x4 + REG_SIZE * id, \
.intr_cfg_reg = REG_BASE + 0x8 + REG_SIZE * id, \
.intr_status_reg = REG_BASE + 0xc + REG_SIZE * id, \
- .intr_target_reg = REG_BASE + 0x8 + REG_SIZE * id, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
@@ -60,7 +59,6 @@
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = pull, \
.drv_bit = drv, \
diff --git a/drivers/pinctrl/qcom/pinctrl-sm4450.c b/drivers/pinctrl/qcom/pinctrl-sm4450.c
index d51e271e3361..83650f173b01 100644
--- a/drivers/pinctrl/qcom/pinctrl-sm4450.c
+++ b/drivers/pinctrl/qcom/pinctrl-sm4450.c
@@ -33,7 +33,6 @@
.io_reg = 0x4 + REG_SIZE * id, \
.intr_cfg_reg = 0x8 + REG_SIZE * id, \
.intr_status_reg = 0xc + REG_SIZE * id, \
- .intr_target_reg = 0x8 + REG_SIZE * id, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
@@ -61,7 +60,6 @@
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = pull, \
.drv_bit = drv, \
@@ -86,7 +84,6 @@
.io_reg = offset + 0x4, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = 3, \
.drv_bit = 0, \
diff --git a/drivers/pinctrl/qcom/pinctrl-sm6115.c b/drivers/pinctrl/qcom/pinctrl-sm6115.c
index 06700685ea2a..234451fbf47b 100644
--- a/drivers/pinctrl/qcom/pinctrl-sm6115.c
+++ b/drivers/pinctrl/qcom/pinctrl-sm6115.c
@@ -43,7 +43,6 @@ enum {
.io_reg = 0x4 + 0x1000 * id, \
.intr_cfg_reg = 0x8 + 0x1000 * id, \
.intr_status_reg = 0xc + 0x1000 * id, \
- .intr_target_reg = 0x8 + 0x1000 * id, \
.tile = _tile, \
.mux_bit = 2, \
.pull_bit = 0, \
@@ -70,7 +69,6 @@ enum {
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.tile = _tile, \
.mux_bit = -1, \
.pull_bit = pull, \
@@ -96,7 +94,6 @@ enum {
.io_reg = offset + 0x4, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.tile = WEST, \
.mux_bit = -1, \
.pull_bit = 3, \
diff --git a/drivers/pinctrl/qcom/pinctrl-sm6125.c b/drivers/pinctrl/qcom/pinctrl-sm6125.c
index 5d3d1e402345..2cf9136860fc 100644
--- a/drivers/pinctrl/qcom/pinctrl-sm6125.c
+++ b/drivers/pinctrl/qcom/pinctrl-sm6125.c
@@ -40,7 +40,6 @@ enum {
.io_reg = 0x4 + 0x1000 * id, \
.intr_cfg_reg = 0x8 + 0x1000 * id, \
.intr_status_reg = 0xc + 0x1000 * id, \
- .intr_target_reg = 0x8 + 0x1000 * id, \
.tile = _tile, \
.mux_bit = 2, \
.pull_bit = 0, \
@@ -67,7 +66,6 @@ enum {
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.tile = _tile, \
.mux_bit = -1, \
.pull_bit = pull, \
@@ -93,7 +91,6 @@ enum {
.io_reg = offset + 0x4, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.tile = WEST, \
.mux_bit = -1, \
.pull_bit = 3, \
diff --git a/drivers/pinctrl/qcom/pinctrl-sm6350.c b/drivers/pinctrl/qcom/pinctrl-sm6350.c
index 220fb582cac9..eb8cd4aa8a97 100644
--- a/drivers/pinctrl/qcom/pinctrl-sm6350.c
+++ b/drivers/pinctrl/qcom/pinctrl-sm6350.c
@@ -33,7 +33,6 @@
.io_reg = 0x4 + REG_SIZE * id, \
.intr_cfg_reg = 0x8 + REG_SIZE * id, \
.intr_status_reg = 0xc + REG_SIZE * id, \
- .intr_target_reg = 0x8 + REG_SIZE * id, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
@@ -59,7 +58,6 @@
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = pull, \
.drv_bit = drv, \
@@ -84,7 +82,6 @@
.io_reg = offset + 0x4, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = 3, \
.drv_bit = 0, \
diff --git a/drivers/pinctrl/qcom/pinctrl-sm6375.c b/drivers/pinctrl/qcom/pinctrl-sm6375.c
index 08b8ef6efaf0..d4547dd9f21f 100644
--- a/drivers/pinctrl/qcom/pinctrl-sm6375.c
+++ b/drivers/pinctrl/qcom/pinctrl-sm6375.c
@@ -34,7 +34,6 @@
.io_reg = REG_SIZE * id + 0x4, \
.intr_cfg_reg = REG_SIZE * id + 0x8, \
.intr_status_reg = REG_SIZE * id + 0xc, \
- .intr_target_reg = REG_SIZE * id + 0x8, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
@@ -62,7 +61,6 @@
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = pull, \
.drv_bit = drv, \
@@ -87,7 +85,6 @@
.io_reg = offset + 0x4, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = 3, \
.drv_bit = 0, \
diff --git a/drivers/pinctrl/qcom/pinctrl-sm7150.c b/drivers/pinctrl/qcom/pinctrl-sm7150.c
index 78dd8153a4d4..a01437c37525 100644
--- a/drivers/pinctrl/qcom/pinctrl-sm7150.c
+++ b/drivers/pinctrl/qcom/pinctrl-sm7150.c
@@ -47,7 +47,6 @@ enum {
.io_reg = 0x4 + REG_SIZE * id, \
.intr_cfg_reg = 0x8 + REG_SIZE * id, \
.intr_status_reg = 0xc + REG_SIZE * id, \
- .intr_target_reg = 0x8 + REG_SIZE * id, \
.tile = _tile, \
.mux_bit = 2, \
.pull_bit = 0, \
@@ -74,7 +73,6 @@ enum {
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.tile = _tile, \
.mux_bit = -1, \
.pull_bit = pull, \
@@ -100,7 +98,6 @@ enum {
.io_reg = offset + 0x4, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.tile = WEST, \
.mux_bit = -1, \
.pull_bit = 3, \
diff --git a/drivers/pinctrl/qcom/pinctrl-sm8150.c b/drivers/pinctrl/qcom/pinctrl-sm8150.c
index ad861cd66958..0767261f5149 100644
--- a/drivers/pinctrl/qcom/pinctrl-sm8150.c
+++ b/drivers/pinctrl/qcom/pinctrl-sm8150.c
@@ -43,7 +43,6 @@ enum {
.io_reg = 0x1000 * id + 0x4, \
.intr_cfg_reg = 0x1000 * id + 0x8, \
.intr_status_reg = 0x1000 * id + 0xc, \
- .intr_target_reg = 0x1000 * id + 0x8, \
.tile = _tile, \
.mux_bit = 2, \
.pull_bit = 0, \
@@ -70,7 +69,6 @@ enum {
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.tile = NORTH, \
.mux_bit = -1, \
.pull_bit = pull, \
@@ -96,7 +94,6 @@ enum {
.io_reg = offset + 0x4, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.tile = SOUTH, \
.mux_bit = -1, \
.pull_bit = 3, \
diff --git a/drivers/pinctrl/qcom/pinctrl-sm8250.c b/drivers/pinctrl/qcom/pinctrl-sm8250.c
index f05361f3100d..f73f3b052de4 100644
--- a/drivers/pinctrl/qcom/pinctrl-sm8250.c
+++ b/drivers/pinctrl/qcom/pinctrl-sm8250.c
@@ -44,7 +44,6 @@ enum {
.io_reg = REG_SIZE * id + 0x4, \
.intr_cfg_reg = REG_SIZE * id + 0x8, \
.intr_status_reg = REG_SIZE * id + 0xc, \
- .intr_target_reg = REG_SIZE * id + 0x8, \
.tile = _tile, \
.mux_bit = 2, \
.pull_bit = 0, \
@@ -73,7 +72,6 @@ enum {
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.tile = NORTH, \
.mux_bit = -1, \
.pull_bit = pull, \
@@ -99,7 +97,6 @@ enum {
.io_reg = offset + 0x4, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.tile = SOUTH, \
.mux_bit = -1, \
.pull_bit = 3, \
diff --git a/drivers/pinctrl/qcom/pinctrl-sm8350.c b/drivers/pinctrl/qcom/pinctrl-sm8350.c
index 99949b552021..377ddfc77e4f 100644
--- a/drivers/pinctrl/qcom/pinctrl-sm8350.c
+++ b/drivers/pinctrl/qcom/pinctrl-sm8350.c
@@ -34,7 +34,6 @@
.io_reg = REG_SIZE * id + 0x4, \
.intr_cfg_reg = REG_SIZE * id + 0x8, \
.intr_status_reg = REG_SIZE * id + 0xc, \
- .intr_target_reg = REG_SIZE * id + 0x8, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
@@ -60,7 +59,6 @@
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = pull, \
.drv_bit = drv, \
@@ -85,7 +83,6 @@
.io_reg = offset + 0x4, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = 3, \
.drv_bit = 0, \
diff --git a/drivers/pinctrl/qcom/pinctrl-sm8450.c b/drivers/pinctrl/qcom/pinctrl-sm8450.c
index 9889fc5dc2cd..a1d84074ea49 100644
--- a/drivers/pinctrl/qcom/pinctrl-sm8450.c
+++ b/drivers/pinctrl/qcom/pinctrl-sm8450.c
@@ -34,7 +34,6 @@
.io_reg = 0x4 + REG_SIZE * id, \
.intr_cfg_reg = 0x8 + REG_SIZE * id, \
.intr_status_reg = 0xc + REG_SIZE * id, \
- .intr_target_reg = 0x8 + REG_SIZE * id, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
@@ -62,7 +61,6 @@
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = pull, \
.drv_bit = drv, \
@@ -87,7 +85,6 @@
.io_reg = offset + 0x4, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = 3, \
.drv_bit = 0, \
diff --git a/drivers/pinctrl/qcom/pinctrl-sm8550.c b/drivers/pinctrl/qcom/pinctrl-sm8550.c
index 10a62031fdfd..cc8fbf4d5e84 100644
--- a/drivers/pinctrl/qcom/pinctrl-sm8550.c
+++ b/drivers/pinctrl/qcom/pinctrl-sm8550.c
@@ -35,7 +35,6 @@
.io_reg = 0x4 + REG_SIZE * id, \
.intr_cfg_reg = 0x8 + REG_SIZE * id, \
.intr_status_reg = 0xc + REG_SIZE * id, \
- .intr_target_reg = 0x8 + REG_SIZE * id, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
@@ -64,7 +63,6 @@
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = pull, \
.drv_bit = drv, \
@@ -89,7 +87,6 @@
.io_reg = offset + 0x4, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = 3, \
.drv_bit = 0, \
diff --git a/drivers/pinctrl/qcom/pinctrl-sm8650.c b/drivers/pinctrl/qcom/pinctrl-sm8650.c
index e2ae03800206..ab41292e3b4e 100644
--- a/drivers/pinctrl/qcom/pinctrl-sm8650.c
+++ b/drivers/pinctrl/qcom/pinctrl-sm8650.c
@@ -36,7 +36,6 @@
.io_reg = 0x4 + REG_SIZE * id, \
.intr_cfg_reg = 0x8 + REG_SIZE * id, \
.intr_status_reg = 0xc + REG_SIZE * id, \
- .intr_target_reg = 0x8 + REG_SIZE * id, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
@@ -67,7 +66,6 @@
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = pull, \
.drv_bit = drv, \
@@ -92,7 +90,6 @@
.io_reg = io, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = 3, \
.drv_bit = 0, \
diff --git a/drivers/pinctrl/qcom/pinctrl-sm8750.c b/drivers/pinctrl/qcom/pinctrl-sm8750.c
index 6f92f176edd4..4cfe73f30fac 100644
--- a/drivers/pinctrl/qcom/pinctrl-sm8750.c
+++ b/drivers/pinctrl/qcom/pinctrl-sm8750.c
@@ -35,7 +35,6 @@
.io_reg = 0x4 + REG_SIZE * id, \
.intr_cfg_reg = 0x8 + REG_SIZE * id, \
.intr_status_reg = 0xc + REG_SIZE * id, \
- .intr_target_reg = 0x8 + REG_SIZE * id, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
@@ -65,7 +64,6 @@
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = pull, \
.drv_bit = drv, \
@@ -90,7 +88,6 @@
.io_reg = io, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = 3, \
.drv_bit = 0, \
diff --git a/drivers/pinctrl/qcom/pinctrl-x1e80100.c b/drivers/pinctrl/qcom/pinctrl-x1e80100.c
index bb36f40b19fa..a9fe75fc45e5 100644
--- a/drivers/pinctrl/qcom/pinctrl-x1e80100.c
+++ b/drivers/pinctrl/qcom/pinctrl-x1e80100.c
@@ -33,7 +33,6 @@
.io_reg = 0x4 + REG_SIZE * id, \
.intr_cfg_reg = 0x8 + REG_SIZE * id, \
.intr_status_reg = 0xc + REG_SIZE * id, \
- .intr_target_reg = 0x8 + REG_SIZE * id, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
@@ -62,7 +61,6 @@
.io_reg = 0, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = pull, \
.drv_bit = drv, \
@@ -87,7 +85,6 @@
.io_reg = offset + 0x4, \
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
- .intr_target_reg = 0, \
.mux_bit = -1, \
.pull_bit = 3, \
.drv_bit = 0, \
--
2.53.0