Re: [PATCH] mm/slab: align kmalloc to cacheline when DMA API debugging is active

From: Mikhail Gavrilov

Date: Fri Mar 27 2026 - 06:27:18 EST


On Fri, Mar 27, 2026 at 1:43 PM Harry Yoo (Oracle) <harry@xxxxxxxxxx> wrote:
>
> Probably what I said was misleading...
>
> I didn't mean "the architecture is fine with overlapping cacheline".
>
> I meant "not defining ARCH_DMA_MINALIGN or defining it as smaller than
> L1_CACHE_BYTES is how architectures tell kmalloc subsystem that
> kmalloc objects don't have to be aligned with cacheline size."
>

Hi Harry,

You're right, I was wrong about dma_get_cache_alignment() -- on
x86_64 without ARCH_HAS_DMA_MINALIGN it returns 1, not
L1_CACHE_BYTES. Sorry for the confusion.

So your suggestion to suppress the warning in dma-debug when
dma_get_cache_alignment() < L1_CACHE_BYTES would indeed work
on x86_64 and other coherent platforms.

I don't have a strong preference either way. Both approaches
solve the problem:

- slab side: prevents the overlap from happening
- dma-debug side: tolerates the overlap when the arch says
cacheline alignment isn't required for DMA

Would you prefer I send a v2 with the dma-debug approach instead?
Happy to go whichever direction the maintainers prefer.

--
Best Regards,
Mike Gavrilov.