Re: [PATCH 1/7] KVM: SVM: Initialize FRED VMCB fields

[Christian Ludloff]

On Fri, Mar 27, 2026 at 7:47 AM Shivansh Dhiman <shivansh.dhiman@xxxxxxx> wrote:
> On 14-03-2026 18:25, Christian Ludloff wrote:
> >>> Is this architecturally correct?  I.e. are all the FRED MSRs zeroed on INIT?
> >> Yes that's right, the FRED MSRs are zeroed on init.
> >
> > Ahem... citation required, please.  :)
> >
> > Because the FRED spec certainly claims otherwise:
> >
> >   "The RESET state of each of the new MSRs is zero.
> >   INIT does not change the value of the FRED MSRs."
> >
> > See SDM vol3 #325384-090 @ end of section 8.2.3.
> >
> > Getting initialized by INIT tends to be outlier behavior
> > when it comes to MSRs – MPX, CET, EFER, FS/GS/
> > kGS... but afaik the rest all remain unchanged.
>
> Thanks for pointing this out. After consulting with the hardware folks, it
> turns out the FRED MSRs are left unchanged on INIT. I had mistakenly mixed
> up the INIT and RESET behavior. Apologies for the confusion.

Thanks.

> I'll update the patch to only zero the FRED MSRs on RESET. Will address this
> in v2.

Thanks.

> > And yes... this will need clarification from Intel... given
> > that CET_PL0_SSP = FRED_SSP0_SL0... and it can
> > not be both, unchanged and set-to-zero...  8-)

Intel folks – can you please state the CET INIT behavior,
for SSP as well as the 4+1+2=7 MSRs, at long last? The
answer I was given years ago was "like RESET", but for
at least PL0_SSP that doesn't match SSP0_SL0.

--
C.