[PATCH v6 89/90] x86/cpu: Remove x86_capability[] and x86_power

From: Ahmed S. Darwish

Date: Thu Mar 26 2026 - 22:34:10 EST


X86_FEATURE queries are now routed to the CPUID tables instead of to
x86_capability[].

x86_power call sites have all been converted to parsed CPUID(0x80000007)
access.

Remove x86_capability[] and x86_power from struct cpuinfo_x86.

Signed-off-by: Ahmed S. Darwish <darwi@xxxxxxxxxxxxx>
---
arch/x86/include/asm/processor.h | 10 ----------
arch/x86/kernel/asm-offsets.c | 1 -
arch/x86/kernel/cpu/common.c | 5 -----
arch/x86/kernel/head_32.S | 2 --
4 files changed, 18 deletions(-)

diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 5ee0dcbd548c..b5c89229d9a2 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -153,15 +153,6 @@ struct cpuinfo_x86 {
__u32 extended_cpuid_level;
/* Maximum supported CPUID level, -1=no CPUID: */
int cpuid_level;
- /*
- * Align to size of unsigned long because the x86_capability array
- * is passed to bitops which require the alignment. Use unnamed
- * union to enforce the array is aligned to size of unsigned long.
- */
- union {
- __u32 x86_capability[NCAPINTS + NBUGINTS];
- unsigned long x86_capability_alignment;
- };
char x86_vendor_id[16];
char x86_model_id[64];
struct cpuinfo_topology topo;
@@ -173,7 +164,6 @@ struct cpuinfo_x86 {
int x86_cache_max_rmid; /* max index */
int x86_cache_occ_scale; /* scale to bytes */
int x86_cache_mbm_width_offset;
- int x86_power;
unsigned long loops_per_jiffy;
/* protected processor identification number */
u64 ppin;
diff --git a/arch/x86/kernel/asm-offsets.c b/arch/x86/kernel/asm-offsets.c
index 0bc36d617801..98d2cd03d0af 100644
--- a/arch/x86/kernel/asm-offsets.c
+++ b/arch/x86/kernel/asm-offsets.c
@@ -38,7 +38,6 @@ static void __used common(void)
OFFSET(CPUINFO_x86_model, cpuinfo_x86, x86_model);
OFFSET(CPUINFO_x86_stepping, cpuinfo_x86, x86_stepping);
OFFSET(CPUINFO_cpuid_level, cpuinfo_x86, cpuid_level);
- OFFSET(CPUINFO_x86_capability, cpuinfo_x86, x86_capability);
OFFSET(CPUINFO_x86_vendor_id, cpuinfo_x86, x86_vendor_id);
DEFINE(CPUINFO_CPUID_0x1_EDX,
offsetof(struct cpuinfo_x86, cpuid) +
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 4c2739f31e3d..a5e94f09c5dd 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1727,7 +1727,6 @@ static void __init cpu_parse_early_param(void)
*/
static void __init early_identify_cpu(struct cpuinfo_x86 *c)
{
- memset(&c->x86_capability, 0, sizeof(c->x86_capability));
memset(&c->cpuid, 0, sizeof(c->cpuid));
c->extended_cpuid_level = 0;

@@ -1959,7 +1958,6 @@ static void identify_cpu(struct cpuinfo_x86 *c)
c->x86_virt_bits = 32;
#endif
c->x86_cache_alignment = c->x86_clflush_size;
- memset(&c->x86_capability, 0, sizeof(c->x86_capability));
memset(&c->cpuid, 0, sizeof(c->cpuid));
#ifdef CONFIG_X86_VMX_FEATURE_NAMES
memset(&c->vmx_capability, 0, sizeof(c->vmx_capability));
@@ -1987,9 +1985,6 @@ static void identify_cpu(struct cpuinfo_x86 *c)
* features a certain CPU supports which CPUID doesn't
* tell us, CPUID claiming incorrect flags, or other bugs,
* we handle them here.
- *
- * At the end of this section, c->x86_capability better
- * indicate the features this CPU genuinely supports!
*/
if (this_cpu->c_init)
this_cpu->c_init(c);
diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S
index 6dcc27014641..7f38331ee083 100644
--- a/arch/x86/kernel/head_32.S
+++ b/arch/x86/kernel/head_32.S
@@ -41,7 +41,6 @@
#define X86_STEPPING new_cpu_data+CPUINFO_x86_stepping
#define X86_HARD_MATH new_cpu_data+CPUINFO_hard_math
#define X86_CPUID new_cpu_data+CPUINFO_cpuid_level
-#define X86_CAPABILITY new_cpu_data+CPUINFO_x86_capability
#define X86_VENDOR_ID new_cpu_data+CPUINFO_x86_vendor_id
#define X86_FEATUREFLAG new_cpu_data+CPUINFO_CPUID_0x1_EDX

@@ -263,7 +262,6 @@ SYM_FUNC_START(startup_32_smp)
movb %al,X86_MODEL
andb $0x0f,%cl # mask mask revision
movb %cl,X86_STEPPING
- movl %edx,X86_CAPABILITY
movl %edx,X86_FEATUREFLAG

.Lis486:
--
2.53.0