Re: [PATCH 2/2] serial: sh-sci: Add support for RZ/G3L RSCI

[Geert Uytterhoeven]

On Thu, 12 Mar 2026 at 09:27, Biju <biju.das.au@xxxxxxxxx> wrote:
> From: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
>
> Add support for RZ/G3L RSCI. The RSCI IP found on the RZ/G3L SoC is
> similar to RZ/G3E, but it has 3 clocks (2 module clocks + 1 external
> clock) instead of 6 clocks (5 module clocks + 1 external clock) on the
> RZ/G3E. Both RZ/G3L and RZ/G3E have a 32-bit FIFO, but RZ/G3L has a
> single TCLK with internal dividers, whereas the RZ/G3E has explicit
> clocks for TCLK and its dividers. Add a new port type
> RSCI_PORT_SCIF32_SINGLE_TCLK to handle this clock difference.
>
> Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>

Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds