Re: [PATCH v2 1/1] arm64: dts: cix: add FCH(S0)/S5 GPIO controllers for sky1

[Peter Chen]

On 26-03-12 17:49:23, Zichar Zhang wrote:
> Add Cadence GPIO controller nodes for Sky1 FCH(S0) and S5 domains in
> sky1.dtsi, and enable those controllers on sky1-orion-o6.
> 
> Signed-off-by: Zichar Zhang <zichar.zhang@xxxxxxxxxxx>

Applied, thanks.

Peter
> ---
>  arch/arm64/boot/dts/cix/sky1-orion-o6.dts |  28 +++++
>  arch/arm64/boot/dts/cix/sky1.dtsi         | 119 ++++++++++++++++++++++
>  2 files changed, 147 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/cix/sky1-orion-o6.dts b/arch/arm64/boot/dts/cix/sky1-orion-o6.dts
> index 4dee8cd0b86d..e39c87774c12 100644
> --- a/arch/arm64/boot/dts/cix/sky1-orion-o6.dts
> +++ b/arch/arm64/boot/dts/cix/sky1-orion-o6.dts
> @@ -36,6 +36,22 @@ linux,cma {
>  
>  };
>  
> +&fch_gpio0 {
> +	status = "okay";
> +};
> +
> +&fch_gpio1 {
> +	status = "okay";
> +};
> +
> +&fch_gpio2 {
> +	status = "okay";
> +};
> +
> +&fch_gpio3 {
> +	status = "okay";
> +};
> +
>  &iomuxc {
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&pinctrl_hog>;
> @@ -86,6 +102,18 @@ &pcie_x1_1_rc {
>  	status = "okay";
>  };
>  
> +&s5_gpio0 {
> +	status = "okay";
> +};
> +
> +&s5_gpio1 {
> +	status = "okay";
> +};
> +
> +&s5_gpio2 {
> +	status = "okay";
> +};
> +
>  &uart2 {
>  	status = "okay";
>  };
> diff --git a/arch/arm64/boot/dts/cix/sky1.dtsi b/arch/arm64/boot/dts/cix/sky1.dtsi
> index 72f3b195a927..3772548e8c0b 100644
> --- a/arch/arm64/boot/dts/cix/sky1.dtsi
> +++ b/arch/arm64/boot/dts/cix/sky1.dtsi
> @@ -185,6 +185,13 @@ psci {
>  		method = "smc";
>  	};
>  
> +	s5_gpio_apb_clk: clock-100000000 {
> +		compatible = "fixed-clock";
> +		#clock-cells = <0>;
> +		clock-frequency = <100000000>;
> +		clock-output-names = "s5_gpio_apb_clk";
> +	};
> +
>  	soc@0 {
>  		compatible = "simple-bus";
>  		ranges = <0 0 0 0 0x20 0>;
> @@ -348,6 +355,70 @@ i3c1: i3c@4100000 {
>  			status = "disabled";
>  		};
>  
> +		fch_gpio0: gpio-controller@4120000 {
> +			compatible = "cdns,gpio-r1p02";
> +			reg = <0x0 0x4120000 0x0 0x1000>;
> +			clocks = <&scmi_clk CLK_TREE_FCH_GPIO_APB>;
> +
> +			interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH 0>;
> +
> +			gpio-controller;
> +			#gpio-cells = <2>;
> +			ngpios = <32>;
> +
> +			interrupt-controller;
> +			#interrupt-cells = <2>;
> +			status = "disabled";
> +		};
> +
> +		fch_gpio1: gpio-controller@4130000 {
> +			compatible = "cdns,gpio-r1p02";
> +			reg = <0x0 0x4130000 0x0 0x1000>;
> +			clocks = <&scmi_clk CLK_TREE_FCH_GPIO_APB>;
> +
> +			interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH 0>;
> +
> +			gpio-controller;
> +			#gpio-cells = <2>;
> +			ngpios = <32>;
> +
> +			interrupt-controller;
> +			#interrupt-cells = <2>;
> +			status = "disabled";
> +		};
> +
> +		fch_gpio2: gpio-controller@4140000 {
> +			compatible = "cdns,gpio-r1p02";
> +			reg = <0x0 0x4140000 0x0 0x1000>;
> +			clocks = <&scmi_clk CLK_TREE_FCH_GPIO_APB>;
> +
> +			interrupts = <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH 0>;
> +
> +			gpio-controller;
> +			#gpio-cells = <2>;
> +			ngpios = <32>;
> +
> +			interrupt-controller;
> +			#interrupt-cells = <2>;
> +			status = "disabled";
> +		};
> +
> +		fch_gpio3: gpio-controller@4150000 {
> +			compatible = "cdns,gpio-r1p02";
> +			reg = <0x0 0x4150000 0x0 0x1000>;
> +			clocks = <&scmi_clk CLK_TREE_FCH_GPIO_APB>;
> +
> +			interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH 0>;
> +
> +			gpio-controller;
> +			#gpio-cells = <2>;
> +			ngpios = <17>;
> +
> +			interrupt-controller;
> +			#interrupt-cells = <2>;
> +			status = "disabled";
> +		};
> +
>  		syscon: syscon@4160000 {
>  			compatible = "cix,sky1-system-control", "syscon";
>  			reg = <0x0 0x4160000 0x0 0x100>;
> @@ -587,6 +658,54 @@ s5_syscon: syscon@16000000 {
>  			#reset-cells = <1>;
>  		};
>  
> +		s5_gpio0: gpio-controller@16004000 {
> +			compatible = "cdns,gpio-r1p02";
> +			reg = <0x0 0x16004000 0x0 0x1000>;
> +			clocks = <&s5_gpio_apb_clk>;
> +
> +			interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH 0>;
> +
> +			gpio-controller;
> +			#gpio-cells = <2>;
> +			ngpios = <32>;
> +
> +			interrupt-controller;
> +			#interrupt-cells = <2>;
> +			status = "disabled";
> +		};
> +
> +		s5_gpio1: gpio-controller@16005000 {
> +			compatible = "cdns,gpio-r1p02";
> +			reg = <0x0 0x16005000 0x0 0x1000>;
> +			clocks = <&s5_gpio_apb_clk>;
> +
> +			interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH 0>;
> +
> +			gpio-controller;
> +			#gpio-cells = <2>;
> +			ngpios = <10>;
> +
> +			interrupt-controller;
> +			#interrupt-cells = <2>;
> +			status = "disabled";
> +		};
> +
> +		s5_gpio2: gpio-controller@16006000 {
> +			compatible = "cdns,gpio-r1p02";
> +			reg = <0x0 0x16006000 0x0 0x1000>;
> +			clocks = <&s5_gpio_apb_clk>;
> +
> +			interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH 0>;
> +
> +			gpio-controller;
> +			#gpio-cells = <2>;
> +			ngpios = <10>;
> +
> +			interrupt-controller;
> +			#interrupt-cells = <2>;
> +			status = "disabled";
> +		};
> +
>  		iomuxc_s5: pinctrl@16007000 {
>  			compatible = "cix,sky1-pinctrl-s5";
>  			reg = <0x0 0x16007000 0x0 0x1000>;
> -- 
> 2.34.1
> 

-- 

Best regards,
Peter