Re: [PATCH v2] arm64: dts: qcom: glymur: add coresight nodes
From: Konrad Dybcio
Date: Mon Mar 23 2026 - 09:09:41 EST
On 3/23/26 1:30 PM, Jie Gan wrote:
>
>
> On 3/23/2026 7:05 PM, Konrad Dybcio wrote:
>> On 3/18/26 12:42 PM, Jie Gan wrote:
>>> Add CoreSight nodes to enable trace paths like TPDM->ETF/STM->ETF.
>>> These devices are part of the AOSS, CDSP, QDSS, PCIe5, TraceNoc and
>>> some small subsystems, such as GCC, IPCC, PMU and so on.
>>>
>>> Signed-off-by: Jie Gan <jie.gan@xxxxxxxxxxxxxxxx>
>>> ---
>>> Changes in V2:
>>> 1. removed two cti devices due to GFX block is down
>>
>> i.e. "because GPU is not yet enabled"?
>
> Yeah, these CTI devices have clock issue for enabling due to the GPU block is not yet enabled.
Do they need the GPU to be online, or a clock from GPU_CC, or
maybe something else?
>>> - cti@11c42000
>>> - cti@11c4b000
>>> 2. changes two TPDM devices to static:
>>> - tpdm-cdsp-cmsr
>>> - tpdm-cdsp-cmsr2
>>
>> They were TPDM instances in v1. What's the reason for the change?
>
> These TPDMs havent clock source for accessing registers. We only need enable its ports to output trace data. So I have changed them to static-TPDM compatible.
The registers are clearly physically there. Are you saying that we
(currently?) can't enable the clock required to access them? Or is
there a design defect that's preventing us from doing so?
Konrad