Re: [PATCH] drm/panthor: correct firmware related messages
From: Boris Brezillon
Date: Mon Mar 23 2026 - 04:27:51 EST
On Mon, 23 Mar 2026 08:11:32 +0000
Christian Hewitt <christianshewitt@xxxxxxxxx> wrote:
> Some English language corrections to firmware messages. No
> functional changes.
>
> Signed-off-by: Christian Hewitt <christianshewitt@xxxxxxxxx>
Reviewed-by: Boris Brezillon <boris.brezillon@xxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/panthor/panthor_fw.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/panthor/panthor_fw.c b/drivers/gpu/drm/panthor/panthor_fw.c
> index a64ec8756bed..349bb6b0e7bf 100644
> --- a/drivers/gpu/drm/panthor/panthor_fw.c
> +++ b/drivers/gpu/drm/panthor/panthor_fw.c
> @@ -580,7 +580,7 @@ static int panthor_fw_load_section_entry(struct panthor_device *ptdev,
>
> if (hdr.flags & CSF_FW_BINARY_IFACE_ENTRY_PROT) {
> drm_warn(&ptdev->base,
> - "Firmware protected mode entry not be supported, ignoring");
> + "Firmware protected mode entry is not supported, ignoring");
> return 0;
> }
>
> @@ -749,7 +749,7 @@ static int panthor_fw_load_entry(struct panthor_device *ptdev,
>
> if ((iter->offset % sizeof(u32)) ||
> (CSF_FW_BINARY_ENTRY_SIZE(ehdr) % sizeof(u32))) {
> - drm_err(&ptdev->base, "Firmware entry isn't 32 bit aligned, offset=0x%x size=0x%x\n",
> + drm_err(&ptdev->base, "Firmware entry is not 32-bit aligned, offset=0x%x size=0x%x\n",
> (u32)(iter->offset - sizeof(u32)), CSF_FW_BINARY_ENTRY_SIZE(ehdr));
> return -EINVAL;
> }