[PATCH] riscv: dts: spacemit: drop incorrect pinctrl for combo PHY

From: Aurelien Jarno

Date: Sun Mar 22 2026 - 16:25:28 EST


The combo PHY on the Banana Pi F3 is used for the USB 3.0 port. The high
speed differential lanes are always configured as such, and do not
require a pinctrl entry.

The existing pinctrl entry only configures PCIe secondary pins, which
are unused for USB and instead routed to the MIPI CSI1 connector.

Remove this incorrect pinctrl entry.

Fixes: 0be016a4b5d1b9 ("riscv: dts: spacemit: PCIe and PHY-related updates")
Signed-off-by: Aurelien Jarno <aurelien@xxxxxxxxxxx>
---
arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts | 2 --
1 file changed, 2 deletions(-)

diff --git a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
index 404b69c47b91f..5790d927b93db 100644
--- a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
+++ b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
@@ -81,8 +81,6 @@ usb3_hub_5v: regulator-usb3-hub-5v {
};

&combo_phy {
- pinctrl-names = "default";
- pinctrl-0 = <&pcie0_3_cfg>;
status = "okay";
};

--
2.51.0