Re: [PATCH spi-next 04/11] spi: spi-fsl-lpspi: fsl_lpspi_set_watermark(): use FIELD_PREP() to encode FIFO Status register

[Marc Kleine-Budde]

On 17.03.2026 10:44:51, Marc Kleine-Budde wrote:
> On 16.03.2026 18:49:15, Mark Brown wrote:
> > > > Oh, dear, so that's potentially going to go badly if there's a SoC with
> > > > a bigger FIFO that didn't also increase the watermark field width.  We
> > > > should at least warn about that, and ideally do something sensible.
> >
> > > Good idea, I'll add a warning if the FIFO is bigger than the watermark
> > > field.
> >
> > > To handle this situation I see 2 options:
> > > - warning + limit the FIFO to the usable size due to the currently
> > >   hard-coded watermark width - this will result in reduced throughput
> > > - increase the watermark mask to 8 bits - which is basically how the
> > >   unpatched driver works.
> > >   As outlined in my previous mail, the other code in the driver takes
> > >   care that the watermark stays within the limits.
> >
> > I guess it depends how optimistic we are about hardware engineers
> > keeping the FIFO and watermark depths in sync.
>
> Right, we're talking about FSL/NXP hardware :D
>
> > The first option is more
> > defensive, but like you say it'll hit performance on future devices that
> > do expand the FIFO.  I guess I have a slight preference for that?
>
> Yes - I'll increase the watermark width to 8 bits and add a comment next
> to the GENMASK.

FTR: I decided to use the watermark width of the i.MX93 as an upper
limit for the FIFO order and print an info message.

See https://lore.kernel.org/all/20260319-spi-fsl-lpspi-cleanups-v2-3-02b56c5d44a8@xxxxxxxxxxxxxx

regards,
Marc

-- 
Pengutronix e.K.                 | Marc Kleine-Budde          |
Embedded Linux                   | https://www.pengutronix.de |
Vertretung Nürnberg              | Phone: +49-5121-206917-129 |
Amtsgericht Hildesheim, HRA 2686 | Fax:   +49-5121-206917-9   |

Attachment: signature.asc
Description: PGP signature