Re: [PATCH net-next v1 2/4] r8169: add sfp mode for RTL8116af

From: Andrew Lunn

Date: Thu Mar 19 2026 - 13:13:10 EST


> > We checked our chip documentation and confirmed that the SerDes register file maps
> > all clause 22 registers(e.g. WR 0xeb10<reg_addr>, RD 0xeb14. reg_addr 0x40 is for BMCR,
> > 0x41 for BMSR, 0x42 for PHYSID1, 0x43 for PHYSID2, etc.)
> > As you suggested, I wonder whether the proper approach is to implement a virtual mii_bus
> > and map the standard serdes reg in the new map.
> >
> We'd need to know how the internal PHY and the SerDes play together.
> Whether the usual internal PHY plays any role in communication between MAC and SerDes.
> How interface modes are controlled on MAC and SerDes side, etc.
> If Realtek doesn't implement proper layering in hw, and doesn't have enough knowledge
> about mainline network driver structures, and on the other hand doesn't want to provide
> chip documentation, then the situation somewhat deadlocks.

The PHYSID1 and PHYSID2 might give us some clues. Is it a PCS licensed
from Synopsys?

https://elixir.bootlin.com/linux/v6.19.8/source/include/linux/pcs/pcs-xpcs.h#L24

Andrew