[PATCH spi-next v2 06/11] spi: spi-fsl-lpspi: fsl_lpspi_set_cmd(): use FIELD_PREP to encode Transmit Command register
From: Marc Kleine-Budde
Date: Thu Mar 19 2026 - 13:02:21 EST
Instead of open coding mask and shift operations and to increase
readability use FIELD_PREP() to encode the Transmit Command register.
Signed-off-by: Marc Kleine-Budde <mkl@xxxxxxxxxxxxxx>
---
drivers/spi/spi-fsl-lpspi.c | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/spi-fsl-lpspi.c b/drivers/spi/spi-fsl-lpspi.c
index 4cf73e56d2f2..38e4e991e97e 100644
--- a/drivers/spi/spi-fsl-lpspi.c
+++ b/drivers/spi/spi-fsl-lpspi.c
@@ -86,10 +86,14 @@
#define RSR_RXEMPTY BIT(1)
#define TCR_CPOL BIT(31)
#define TCR_CPHA BIT(30)
+#define TCR_MODE GENMASK(31, 30)
+#define TCR_PRESCALE GENMASK(29, 27)
+#define TCR_PCS GENMASK(25, 24)
#define TCR_CONT BIT(21)
#define TCR_CONTC BIT(20)
#define TCR_RXMSK BIT(19)
#define TCR_TXMSK BIT(18)
+#define TCR_FRAMESZ GENMASK(11, 0)
#define SR_CLEAR_MASK GENMASK(13, 8)
@@ -293,10 +297,10 @@ static void fsl_lpspi_set_cmd(struct fsl_lpspi_data *fsl_lpspi)
{
u32 temp = 0;
- temp |= fsl_lpspi->config.bpw - 1;
- temp |= (fsl_lpspi->config.chip_select & 0x3) << 24;
+ temp |= FIELD_PREP(TCR_FRAMESZ, fsl_lpspi->config.bpw - 1);
+ temp |= FIELD_PREP(TCR_PCS, fsl_lpspi->config.chip_select);
if (!fsl_lpspi->is_target) {
- temp |= fsl_lpspi->config.prescale << 27;
+ temp |= FIELD_PREP(TCR_PRESCALE, fsl_lpspi->config.prescale);
/*
* Set TCR_CONT will keep SS asserted after current transfer.
* For the first transfer, clear TCR_CONTC to assert SS.
--
2.53.0