Re: [PATCH v2 0/5] can: flexcan: Add NXP S32N79 SoC support

[Marc Kleine-Budde]

On 19.03.2026 10:40:27, Ciprian Costea wrote:
> From: Ciprian Marian Costea <ciprianmarian.costea@xxxxxxxxxxx>
>
> This patch series adds FlexCAN support for the NXP S32N79 SoC.
>
> The S32N79 is an automotive-grade processor from NXP with multiple
> FlexCAN instances. The FlexCAN IP integration on S32N79 differs from
> other SoCs in the interrupt routing - it uses two separate interrupt
> lines:
>   - one interrupt for mailboxes 0-127
>   - one interrupt for bus error detection and device state changes
>
> The CAN controllers are connected through an irqsteer interrupt
> controller in the RCU (Resource Control Unit) domain.
>
> This series:
>   1. Adds dt-bindings documentation for S32N79 FlexCAN
>   2. Introduces FLEXCAN_QUIRK_IRQ_BERR to handle the two-interrupt
>      configuration
>   3. Adds S32N79 device data and compatible string to the driver
>   4. Adds FlexCAN device tree nodes for S32N79 SoC
>   5. Enables FlexCAN devices on the S32N79-RDB board
>
> Tested on S32N79-RDB board with CAN and CAN FD communication.

I think DTS changes go into a separate series.

Please also have a look at the AI review:

https://sashiko.dev/#/patchset/20260318092215.23505-1-ciprianmarian.costea%40oss.nxp.com

Especially on patch#3.

I think we should split the main IRQ handler into 3 parts, message buff,
bus error and state change.

regards,
Marc

-- 
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