[PATCH 1/2] dt-bindings: Add Lightning Mountain MSI interrupt controller bindings

[Florian Eckert]

Add device tree bindings for the Lightning Mountain (LGM) MSI interrupt
controller.

Signed-off-by: Florian Eckert <fe@xxxxxxxxxx>
---
 .../interrupt-controller/intel,soc-msi.yaml        | 45 ++++++++++++++++++++++
 1 file changed, 45 insertions(+)

diff --git a/Documentation/devicetree/bindings/interrupt-controller/intel,soc-msi.yaml b/Documentation/devicetree/bindings/interrupt-controller/intel,soc-msi.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..5ab295c7dd000059817ae411abe3d57713a83ee8
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/intel,soc-msi.yaml
@@ -0,0 +1,45 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+# Copyright 2025 TDT AG.
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interrupt-controller/intel,soc-msi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Intel LGM Interrupt Controller
+
+maintainers:
+  - Florian Eckert <fe@xxxxxxxxxx>
+
+description: |
+  This interrupt controller is found in the Intel LGM.
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - intel,soc-msi.yaml
+
+  reg:
+    maxItems: 1
+
+  interrupt-controller: true
+
+  '#interrupt-cells':
+    const: 2
+
+required:
+  - compatible
+  - reg
+  - interrupt-controller
+  - '#interrupt-cells'
+
+additionalProperties: false
+
+examples:
+  - |
+    soc_msi: soc_msi@e00e0000 {
+        compatible = "intel,soc-msi";
+        reg = <0xe00e0000 0x800>;
+        interrupt-controller;
+        #interrupt-cells = <1>;
+    };

-- 
2.47.3