Re: [PATCH 0/3] Add critical resets support to RZ/G2L SoC family

[Geert Uytterhoeven]

Hi Biju,

On Fri, 6 Mar 2026 at 14:42, Biju <biju.das.au@xxxxxxxxx> wrote:
> From: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
>
> Some reset lines must remain deasserted at all times after boot, as
> asserting them would disable critical system functionality with no
> owning driver to restore them. This mirrors the existing crit_mod_clks
> mechanism which protects critical module clocks from being disabled.
>
> On RZ/G2L family SoCs, DMA reset to be deasseted for routing some
> peripheral interrupts to CPU.
>
> After a suspend/resume cycle, critical module clocks may be left
> disabled as the hardware state is not automatically restored. Unlike
> regular clocks which are re-enabled by their respective drivers, critical
> clocks (CLK_IS_CRITICAL) have no owning driver to restore them, so the
> CPG driver must take responsibility for re-enabling them on resume.
>
> Biju Das (3):
>   clk: renesas: rzg2l-cpg: Add support for critical resets
>   clk: renesas: r9a07g04{3,4}/r9a08g045-cpg: Add critical reset entries
>   clk: renesas: rzg2l-cpg: Re-enable critical module clocks during
>     resume

I assume this series supersedes "[PATCH] clk: renesas: rzg2l: Drop DMA
driver dependency for system boot"[1]?

[1] https://lore.kernel.org/20260130143456.256813-1-biju.das.jz@xxxxxxxxxxxxxx

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds