[PATCH 6/8] gpu: nova-core: convert PDISP registers to kernel register macro

From: Alexandre Courbot

Date: Wed Mar 18 2026 - 04:08:22 EST


Convert all PDISP registers to use the kernel's register macro and
update the code accordingly.

Signed-off-by: Alexandre Courbot <acourbot@xxxxxxxxxx>
---
drivers/gpu/nova-core/fb.rs | 6 +++++-
drivers/gpu/nova-core/regs.rs | 12 ++++++++----
2 files changed, 13 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/nova-core/fb.rs b/drivers/gpu/nova-core/fb.rs
index 6536d0035cb1..62fc90fa6a84 100644
--- a/drivers/gpu/nova-core/fb.rs
+++ b/drivers/gpu/nova-core/fb.rs
@@ -8,6 +8,7 @@
use kernel::{
device,
fmt,
+ io::Io,
prelude::*,
ptr::{
Alignable,
@@ -189,7 +190,10 @@ pub(crate) fn new(chipset: Chipset, bar: &Bar0, gsp_fw: &GspFirmware) -> Result<
let base = fb.end - NV_PRAMIN_SIZE;

if hal.supports_display(bar) {
- match regs::NV_PDISP_VGA_WORKSPACE_BASE::read(bar).vga_workspace_addr() {
+ match bar
+ .read(regs::NV_PDISP_VGA_WORKSPACE_BASE)
+ .vga_workspace_addr()
+ {
Some(addr) => {
if addr < base {
const VBIOS_WORKSPACE_SIZE: u64 = usize_as_u64(SZ_128K);
diff --git a/drivers/gpu/nova-core/regs.rs b/drivers/gpu/nova-core/regs.rs
index 9682a94b8b77..4ac4e9126db8 100644
--- a/drivers/gpu/nova-core/regs.rs
+++ b/drivers/gpu/nova-core/regs.rs
@@ -274,10 +274,14 @@ pub(crate) fn usable_fb_size(self) -> u64 {

// PDISP

-register!(NV_PDISP_VGA_WORKSPACE_BASE @ 0x00625f04 {
- 3:3 status_valid as bool, "Set if the `addr` field is valid";
- 31:8 addr as u32, "VGA workspace base address divided by 0x10000";
-});
+nv_reg! {
+ NV_PDISP_VGA_WORKSPACE_BASE @ 0x00625f04 {
+ /// Set if the `addr` field is valid.
+ 3:3 status_valid => bool;
+ /// VGA workspace base address divided by 0x10000.
+ 31:8 addr;
+ }
+}

impl NV_PDISP_VGA_WORKSPACE_BASE {
/// Returns the base address of the VGA workspace, or `None` if none exists.

--
2.53.0