Re: [PATCH net-next v3 0/3] Initial support for PIC64-HPSC/HX Ethernet endpoint
From: Théo Lebrun
Date: Mon Mar 16 2026 - 13:29:50 EST
Hello Charles,
On Fri Mar 13, 2026 at 3:06 PM CET, Charles Perry wrote:
> Hello,
>
> This series add basic support for Microchip "PIC64-HPSC" and "PIC64HX"
> Ethernet endpoint. Both SoCs contain 4 GEM IP with support for
> MII/RGMII/SGMII/USXGMII at rates of 10M to 10G. Only RGMII and SGMII at a
> rate of 1G is tested for now. Each GEM IP has 8 priority queues and the
> revision register reads 0x220c010e.
Do you have plans to test higher rate? We might get our hands on GEMs
that support >1G and would like to know if CCing you would make sense.
> One particularity of this instantiation of GEM is that the MDIO controller
> within the GEM IP is disconnected from any physical pin and the SoC rely on
> another standalone MDIO controller.
Ah, that means you instantiate the MDIO bus for no good reason.
Code looks like:
static int macb_mii_init(struct macb *bp)
{
struct device_node *mdio_np, *np = bp->pdev->dev.of_node;
int err = -ENXIO;
/* With fixed-link, we don't need to register the MDIO bus,
* except if we have a child named "mdio" in the device tree.
* In that case, some devices may be attached to the MACB's MDIO bus.
*/
mdio_np = of_get_child_by_name(np, "mdio");
if (!mdio_np && of_phy_is_fixed_link(np))
return macb_mii_probe(bp->dev);
// ... probe MDIO bus ...
}
So to *not* get the bus we need to be in fixed link config. Do you care
about that? I think that the proper fix would be to lazy probe the MDIO
bus until a PHY (ours or some other MAC's) asks for it.
Thanks,
--
Théo Lebrun, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com