[PATCH 1/4] riscv: add UltraRISC SoC family Kconfig support

[Jia Wang via B4 Relay]

From: Jia Wang <wangjia@xxxxxxxxxxxxx>

The first SoC in the UltraRISC series is UR-DP1000, containing octa
UltraRISC C100 cores.

Signed-off-by: Jia Wang <wangjia@xxxxxxxxxxxxx>
---
 arch/riscv/Kconfig.socs | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index d621b85dd63b..f49d3ccaacde 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -84,6 +84,16 @@ config ARCH_THEAD
 	help
 	  This enables support for the RISC-V based T-HEAD SoCs.
 
+config ARCH_ULTRARISC
+	bool "UltraRISC RISC-V SoCs"
+	depends on MMU && !XIP_KERNEL
+	help
+	 This enables support for UltraRISC SoC platform hardware,
+	 including boards based on the UR-DP1000.
+	 UR-DP1000 is an 8-core 64-bit RISC-V SoC that supports
+	 the RV64GCBHX ISA. It supports Hardware Virtualization
+	 and RISC-V RV64 ISA H(v1.0) Extension.
+
 config ARCH_VIRT
 	bool "QEMU Virt Machine"
 	select POWER_RESET

-- 
2.34.1