Re: [PATCH] iommu/amd: Enable PASID and ATS capabilities in the correct order

[Jason Gunthorpe]

On Thu, Jul 03, 2025 at 08:54:33AM -0700, Easwar Hariharan wrote:
> Per the PCIe spec, behavior of the PASID capability is undefined if the
> value of the PASID Enable bit changes while the Enable bit of the
> function's ATS control register is Set. Unfortunately,
> pdev_enable_caps() does exactly that by ordering enabling ATS for the
> device before enabling PASID.
> 
> Cc: Suravee Suthikulpanit <suravee.suthikulpanit@xxxxxxx>
> Cc: Vasant Hegde <vasant.hegde@xxxxxxx>
> Cc: Jason Gunthorpe <jgg@xxxxxxxxxx>
> Cc: Jerry Snitselaar <jsnitsel@xxxxxxxxxx>
> Fixes: eda8c2860ab679 ("iommu/amd: Enable device ATS/PASID/PRI capabilities independently")
> Signed-off-by: Easwar Hariharan <eahariha@xxxxxxxxxxxxxxxxxxx>
> ---
>  drivers/iommu/amd/iommu.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Reviewed-by: Jason Gunthorpe <jgg@xxxxxxxxxx>

The other two drivers look like they do it Ok.

Jason