Re: [PATCH v3] bus: mhi: host: fix endianness of BHI vector table

From: Alexander Wilhelm
Date: Mon May 19 2025 - 10:48:55 EST


Am Mon, May 19, 2025 at 08:13:00AM -0600 schrieb Jeff Hugo:
> On 5/19/2025 12:10 AM, Alexander Wilhelm wrote:
> > On big endian platform like PowerPC the MHI bus does not start properly. The
> > following example shows the error messages by using qcn9274 wireless radio
> > module with ath12k driver:
> >
> > ath12k_pci 0001:01:00.0: BAR 0: assigned [mem 0xc00000000-0xc001fffff 64bit]
> > ath12k_pci 0001:01:00.0: MSI vectors: 1
> > ath12k_pci 0001:01:00.0: Hardware name: qcn9274 hw2.0
> > ath12k_pci 0001:01:00.0: failed to set mhi state: POWER_ON(2)
> > ath12k_pci 0001:01:00.0: failed to start mhi: -110
> > ath12k_pci 0001:01:00.0: failed to power up :-110
> > ath12k_pci 0001:01:00.0: failed to create soc core: -110
> > ath12k_pci 0001:01:00.0: failed to init core: -110
> > ath12k_pci: probe of 0001:01:00.0 failed with error -110
> >
> > Fix it by swapping DMA address and size of the BHI vector table.
> >
> > Signed-off-by: Alexander Wilhelm <alexander.wilhelm@xxxxxxxxxxxx>
> > Reviewed-by: Jeff Hugo <jeff.hugo@xxxxxxxxxxxxxxxx>
>
> Shouldn't there be a fixes tag? Probably pointing to one of the original
> MHI commits given what this change is touching.
>
> -Jeff

Thank you for supporting me. I will add that in the next patch version. This
patch fixes 3 different origin commits. I would take the first one, where
bhi_vec_entry was first introducted. The following 2 commits are only follow up
errors.

Best regards
Alexander Wilhelm