Re: [PATCH v1 2/2] ethernet: eswin: Add eic7700 ethernet driver

From: Andrew Lunn
Date: Sun May 18 2025 - 18:45:28 EST


> +/* RTL8211F PHY Configurations for LEDs */
> +#define PHY_ADDR 0
> +#define PHY_PAGE_SWITCH_REG 31
> +#define PHY_LED_CFG_REG 16
> +#define PHY_LED_PAGE_CFG 0xd04

The PHY driver is responsible for the PHY LEDs, not the MAC driver.

> +static int dwc_eth_dwmac_config_dt(struct platform_device *pdev,
> + struct plat_stmmacenet_data *plat_dat)
> +{
> + struct device *dev = &pdev->dev;
> + u32 burst_map = 0;
> + u32 bit_index = 0;
> + u32 a_index = 0;
> +
> + if (!plat_dat->axi) {
> + plat_dat->axi = kzalloc(sizeof(*plat_dat->axi), GFP_KERNEL);
> +
> + if (!plat_dat->axi)
> + return -ENOMEM;
> + }
> +
> + plat_dat->axi->axi_lpi_en = device_property_read_bool(dev,
> + "snps,en-lpi");

Please look at the work Russell King has been doing recently, and make
sure you are not adding stuff he has been busy cleaning up.

> +static void dwc_qos_fix_speed(void *priv, int speed, unsigned int mode)
> +{
> + unsigned long rate = 125000000;
> + int i, err, data = 0;
> + struct dwc_qos_priv *dwc_priv = (struct dwc_qos_priv *)priv;
> +
> + switch (speed) {
> + case SPEED_1000:
> + rate = 125000000;
> +
> + for (i = 0; i < 3; i++)
> + regmap_write(dwc_priv->hsp_regmap,
> + dwc_priv->dly_hsp_reg[i],
> + dwc_priv->dly_param_1000m[i]);
> +
> + if (dwc_priv->stmpriv) {
> + data = mdiobus_read(dwc_priv->stmpriv->mii, PHY_ADDR,
> + PHY_PAGE_SWITCH_REG);
> + mdiobus_write(dwc_priv->stmpriv->mii, PHY_ADDR,
> + PHY_PAGE_SWITCH_REG, PHY_LED_PAGE_CFG);
> + mdiobus_write(dwc_priv->stmpriv->mii, PHY_ADDR,
> + PHY_LED_CFG_REG, dwc_priv->phyled_cfgs[0]);
> + mdiobus_write(dwc_priv->stmpriv->mii, PHY_ADDR,
> + PHY_PAGE_SWITCH_REG, data);

Please remove all this LED code.

> + dwc_priv->dev = &pdev->dev;
> + dwc_priv->phy_reset = devm_gpiod_get(&pdev->dev, "rst", GPIOD_OUT_LOW);
> + if (IS_ERR(dwc_priv->phy_reset)) {
> + dev_err(&pdev->dev, "Reset gpio not specified\n");
> + return -EINVAL;
> + }
> +
> + gpiod_set_value(dwc_priv->phy_reset, 0);

Please allow phylib to control the PHY reset line.

> + ret = of_property_read_variable_u32_array(pdev->dev.of_node, "eswin,dly_hsp_reg",
> + &dwc_priv->dly_hsp_reg[0], 3, 0);
> + if (ret != 3) {
> + dev_err(&pdev->dev, "can't get delay hsp reg.ret(%d)\n", ret);
> + return ret;
> + }
> +
> + ret = of_property_read_variable_u32_array(pdev->dev.of_node, "dly-param-1000m",
> + &dwc_priv->dly_param_1000m[0], 3, 0);
> + if (ret != 3) {
> + dev_err(&pdev->dev, "can't get delay param for 1Gbps mode (%d)\n", ret);
> + return ret;
> + }
> +
> + ret = of_property_read_variable_u32_array(pdev->dev.of_node, "dly-param-100m",
> + &dwc_priv->dly_param_100m[0], 3, 0);
> + if (ret != 3) {
> + dev_err(&pdev->dev, "can't get delay param for 100Mbps mode (%d)\n", ret);
> + return ret;
> + }
> +
> + ret = of_property_read_variable_u32_array(pdev->dev.of_node, "dly-param-10m",
> + &dwc_priv->dly_param_10m[0], 3, 0);
> + if (ret != 3) {
> + dev_err(&pdev->dev, "can't get delay param for 10Mbps mode (%d)\n", ret);
> + return ret;
> + }

What are these delay parameters?


Andrew

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