[tip: perf/urgent] perf/x86/amd/core: Fix Family 17h+ instruction cache events
From: tip-bot2 for Sandipan Das
Date: Fri May 16 2025 - 09:48:10 EST
The following commit has been merged into the perf/urgent branch of tip:
Commit-ID: ebe176981c14b5f6472718f9894db35816749120
Gitweb: https://git.kernel.org/tip/ebe176981c14b5f6472718f9894db35816749120
Author: Sandipan Das <sandipan.das@xxxxxxx>
AuthorDate: Wed, 07 May 2025 17:42:04 +05:30
Committer: Ingo Molnar <mingo@xxxxxxxxxx>
CommitterDate: Fri, 16 May 2025 15:32:59 +02:00
perf/x86/amd/core: Fix Family 17h+ instruction cache events
PMCx080 and PMCx081 report incorrect IC accesses and misses respectively
for all Family 17h and later processors. PMCx060 unit mask 0x10 replaces
PMCx081 for counting IC misses but there is no suitable replacement for
counting IC accesses.
Fixes: 0e3b74e26280 ("perf/x86/amd: Update generic hardware cache events for Family 17h")
Signed-off-by: Sandipan Das <sandipan.das@xxxxxxx>
Signed-off-by: Ingo Molnar <mingo@xxxxxxxxxx>
Cc: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
Cc: linux-perf-users@xxxxxxxxxxxxxxx
Link: https://lore.kernel.org/r/2f475a1ba4b240111e69644fc2d5bf93b2e39c99.1746618724.git.sandipan.das@xxxxxxx
---
arch/x86/events/amd/core.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/events/amd/core.c b/arch/x86/events/amd/core.c
index 30d6ceb..52860b9 100644
--- a/arch/x86/events/amd/core.c
+++ b/arch/x86/events/amd/core.c
@@ -148,8 +148,8 @@ static __initconst const u64 amd_hw_cache_event_ids_f17h
},
[C(L1I)] = {
[C(OP_READ)] = {
- [C(RESULT_ACCESS)] = 0x0080, /* Instruction cache fetches */
- [C(RESULT_MISS)] = 0x0081, /* Instruction cache misses */
+ [C(RESULT_ACCESS)] = 0,
+ [C(RESULT_MISS)] = 0x1060, /* L2$ access from IC Miss */
},
[C(OP_WRITE)] = {
[C(RESULT_ACCESS)] = -1,