Re: [PATCH 11/11] perf mem: Add 'dtlb' output field

From: Arnaldo Carvalho de Melo
Date: Fri May 02 2025 - 12:30:44 EST


On Wed, Apr 30, 2025 at 01:55:48PM -0700, Namhyung Kim wrote:
> This is a breakdown of perf_mem_data_src.mem_dtlb values. It assumes
> PMU drivers would set PERF_MEM_TLB_HIT bit with an appropriate level.
> And having PERF_MEM_TLB_MISS means that it failed to find one in any
> levels of TLB. For now, it doesn't use PERF_MEM_TLB_{WK,OS} bits.
>
> Also it seems Intel machines don't distinguish L1 or L2 precisely. So I
> added ANY_HIT (printed as "L?-Hit") to handle the case.
>
> $ perf mem report -F overhead,dtlb,dso --stdio
> ...
> # --- D-TLB ----
> # Overhead L?-Hit Miss Shared Object
> # ........ .............. .................
> #
> 67.03% 99.5% 0.5% [unknown]
> 31.23% 99.2% 0.8% [kernel.kallsyms]
> 1.08% 97.8% 2.2% [i915]
> 0.36% 100.0% 0.0% [JIT] tid 6853
> 0.12% 100.0% 0.0% [drm]
> 0.05% 100.0% 0.0% [drm_kms_helper]
> 0.05% 100.0% 0.0% [ext4]
> 0.02% 100.0% 0.0% [aesni_intel]
> 0.02% 100.0% 0.0% [crc32c_intel]
> 0.02% 100.0% 0.0% [dm_crypt]
> ...

root@number:~# perf report --header | grep cpudesc
# cpudesc : AMD Ryzen 9 9950X3D 16-Core Processor
root@number:~# perf mem report -F overhead,dtlb,dso --stdio | head -20
# To display the perf.data header info, please use --header/--header-only options.
#
#
# Total Lost Samples: 0
#
# Samples: 2K of event 'cycles:P'
# Total weight : 2637
# Sort order : local_weight,mem,sym,dso,symbol_daddr,dso_daddr,snoop,tlb,locked,blocked,local_ins_lat,local_p_stage_cyc
#
# ---------- D-TLB -----------
# Overhead L1-Hit L2-Hit Miss Other Shared Object
# ........ ............................ .................................
#
77.47% 18.4% 0.1% 0.6% 80.9% [kernel.kallsyms]
5.61% 36.5% 0.7% 1.4% 61.5% libxul.so
2.77% 39.7% 0.0% 12.3% 47.9% libc.so.6
2.01% 34.0% 1.9% 1.9% 62.3% libglib-2.0.so.0.8400.1
1.93% 31.4% 2.0% 2.0% 64.7% [amdgpu]
1.63% 48.8% 0.0% 0.0% 51.2% [JIT] tid 60168
1.14% 3.3% 0.0% 0.0% 96.7% [vdso]
root@number:~#