Re: [PATCH v4 3/4] irqchip/sg2042-msi: introduce configurable chipinfo for sg2042

[Inochi Amaoto]

On Mon, Apr 14, 2025 at 08:44:46AM +0800, Chen Wang wrote:
> hi, Inochi,
> 
> On 2025/4/14 6:49, Inochi Amaoto wrote:
> > As the controller on SG2044 uses different msi_parent_ops and irq_chip,
> > it is necessary to add a structure to hold the configuration across
> > controllers.
> > 
> > Add the chipinfo structure and implement necessary logic for it.
> > 
> > Signed-off-by: Inochi Amaoto <inochiama@xxxxxxxxx>
> > Reviewed-by: Chen Wang <unicorn_wang@xxxxxxxxxxx>
> > Tested-by: Chen Wang <wangchen20@xxxxxxxxxxx> # SG2042
> > ---
> >   drivers/irqchip/irq-sg2042-msi.c | 52 ++++++++++++++++++++++++++------
> >   1 file changed, 42 insertions(+), 10 deletions(-)
> > 
> > diff --git a/drivers/irqchip/irq-sg2042-msi.c b/drivers/irqchip/irq-sg2042-msi.c
> > index c9bff7ba693d..1001c1117b00 100644
> > --- a/drivers/irqchip/irq-sg2042-msi.c
> > +++ b/drivers/irqchip/irq-sg2042-msi.c
> > @@ -19,18 +19,33 @@
> >   #include "irq-msi-lib.h"
> > -#define SG2042_MAX_MSI_VECTOR	32
> > +struct sg204x_msi_chip_info {
> > +	const struct irq_chip		*irqchip;
> > +	const struct msi_parent_ops	*parent_ops;
> > +};
> > +/**
> > + * struct sg204x_msi_chipdata - chip data for the SG204x MSI IRQ controller
> > + * @reg_clr:		clear reg, see TRM, 10.1.33, GP_INTR0_CLR
> > + * @doorbell_addr:	see TRM, 10.1.32, GP_INTR0_SET
> 
> I remember asking some questions about this last time, but you didn't
> respond.
> 

Oh, I forgot to respond this. Since the SG2044 document is not opened
public for now. I think it is possible to leave this for someone to
reference it. Also, I find nothing about this address in my copy of the
document, and was told it follows a similar design of SG2042. So I
think it is OK to reserve it at least for now.

Regards,
Inochi