Re: [PATCH 2/3] dt-bindings: net: Document GBETH bindings for Renesas RZ/V2H(P) SoC

From: Russell King (Oracle)
Date: Sun Mar 02 2025 - 14:28:46 EST


On Sun, Mar 02, 2025 at 08:10:26PM +0100, Andrew Lunn wrote:
> > + interrupts:
> > + items:
> > + - description: Subsystem interrupt
> > + - description: The interrupt to manage the remote wake-up packet detection
> > + - description: The interrupt that occurs when Tx/Rx enters/exits the LPI state
> > + - description: Per-channel transmission-0 completion interrupt
> > + - description: Per-channel transmission-1 completion interrupt
> > + - description: Per-channel transmission-2 completion interrupt
> > + - description: Per-channel transmission-3 completion interrupt
> > + - description: Per-channel receive-0 completion interrupt
> > + - description: Per-channel receive-1 completion interrupt
> > + - description: Per-channel receive-2 completion interrupt
> > + - description: Per-channel receive-3 completion interrupt
> > +
> > + interrupt-names:
> > + items:
> > + - const: macirq
> > + - const: eth_wake_irq
> > + - const: eth_lpi
> > + - const: tx0
> > + - const: tx1
> > + - const: tx2
> > + - const: tx3
> > + - const: rx0
> > + - const: rx1
> > + - const: rx2
> > + - const: rx3
>
> There has already been a discussion about trying to make the clock
> names more uniform. But what about interrupts? Which of these are in
> the IP databook? What names does the databook use for these
> interrupts?

>From a quick look, I haven't found anything that suggests the above
is possible, but it clearly is... so I'll look more tomorrow.

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